will loose that functionality right? I mean TX1, RX1 and RX8.
thanks. i think it was the heat but i did not get it. it took Pauls reply to get it. Now i know it makes perfect sense. A picture says more than 1000 words, especial for the slow ones like meSee if reading p#2 again makes sense ... No SPI 1 or SPI 2 or any other pins or PRIMARY pin functions are shared with those bottom side pins.
There are 'light gray' optional alternate functions shown for other indicated 'bus' - but unless those pins are selected, they are not the primary pins use.
If those pins are used for alternate functions, then the QSPI features for PSRAM will not be available elsewhere. QSPI uses 4 data transfer pins versus a single data transfer pin for MOSI and MISO.