I'm trying to get an LCD panel working with a custom T4.1 device, but I'm getting mostly garbage on the screen, so I'm thinking I have signal integrity issues. Here's a pic of the SPI CLCK on my oscilloscope.
I'm guessing I can slow down the SPI interface and get the LCD working properly, but I'm more curious about what this says about how I have things wired up. It almost looks like there's a capacitor on the line. What can cause this kind of issue? Could my traces be too long or too thick? Could SPI CLCK line being too close to other traces account for this?
I'm guessing I can slow down the SPI interface and get the LCD working properly, but I'm more curious about what this says about how I have things wired up. It almost looks like there's a capacitor on the line. What can cause this kind of issue? Could my traces be too long or too thick? Could SPI CLCK line being too close to other traces account for this?