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To be honest, I really not sure. I haven't really ever needed to worry about exactly how the ARM core clears the NVIC pending state. It happens automatically somehow, but I can't say from memory exactly how. You'd need to dive into the ARM...

Hello. Just seeing if there are any Teensy LC’s out there.

I think I’ll start a new thread… I did see that you had run out, per post #4. For some reason I thought using this thread would be more efficient.

Yes, wires are ok if you keep them reasonably short. Longer than about 4 inches / 10 cm would be risky. Pins 6, 10, 11, 12, 13, 15 are optional. If you leave those off, try running examples like Synth > Guitar which don't use the SD card.

Hard to say about speed…. Works reasonably when you boost the psram speed up. I am currently playing with it on Nt35510 display 800 by 480, and I have been playing with different number of bytes per pixel. 2,3,4…

I'm shipping out the last of mine today, sorry.

I could use a few Teensy LC’s if anyone has any more.

So I noticed that this file (on line 122): https://github.com/PaulStoffregen/cores/blob/master/usb_midi/usb.c It says that adding the AC interface has caused MIDI to fail on Linux. So I guess the AC interface has continually been omitted...

Thanks for the code! All the buffers will be declared with EXTMEM and passed to the library. Then as stated in the first post, can they be accessed by DMA when sending to SPI, ideally without speed loss?

Yes that's fine - although it would be called in-line, not in series as that means something very specific in electronics (!). Keep the wires short and direct if possible to reduce the chance of signal degradation. Any pins not connected will...

Is this 'pending' the same state cleared when the interrupt service is marked complete on _isr exit? That is if SysTick 'in progress' when the next SysTick triggers it won't interrupt immediately on exit?

Mst of the libraries, unless you allocate the buffer your self, it will try to use malloc to allocate it. However most if not all, give you and api to set the frame buffer to wherever you want it. One example: tft_frame_buffer = (uint8_t...

ARM implemented a nice "tail chaining" optimization in the hardware, because it is a common case where 1 or more other interrupts are already pending (at the same or lower priority) when your interrupt finishes. Rather than restoring the...

Thank you for fast response. Used only up to 8 hours a day, operate by humans, underwater up to 60 ft sealed in stainless steel sealed house which also is the heat sink. So, what might the problem using your PCB. Did your PCB tested in the...

The processor is not the industrial rated temperature spec version of the part so it depends what exactly you mean by industrial environment. People have made their own Teensy compatible boards using industrial grade versions of the part and...

Thanks To PJRC Staff for making Teensy audio Board. I am new one with this. i have placed order for (teensy 4.1 + Aduio board Rev D) .. here i want to ask About wiring connection. If Audio board is being on Teensy with headers , No problem. But i...

I have attached the .HEX files from both the working version (with Teensyduino 1.57) and the non-working one (Teensyduino 1.59) if that helps

Nah, you just handed me the perfect pass, Mate. It's been a pleasure working with you. Yes, now I'm much more confident about running 1.57b2 on my projector, now. BTW, I used to work for a Cambridge company back in the 1980s, named Laser Point...

Oh yeah I had already read about it but forgot! Can you also confirm the first question?

@PaulStoffregen First, aside, Paul have you tried that ADC we talked about somet time ago? That one has a mux and can share one opamp for all of the channels. I will post or send you the design files if anyone is interested, with the...

I meant <cstdio>, not <stdio.h>.

Does anybody have a report or story about using the Teensy 4.1 in industrial environment? How reliable the Leensy 4.1? Thanks. Elik

I assumed that GPIO pins are not even set nor part of the power off RTC circuit...?

ARM implemented a nice "tail chaining" optimization in the hardware, because it is a common case where 1 or more other interrupts are already pending (at the same or lower priority) when your interrupt finishes. Rather than restoring the...

Every interrupt has a pending bit and a priority level. The priorities are 0 to 255, where 0 is the highest. When the hardware event occurs, the interrupt's pending bit is set. The NVIC (Nested Vector Interrupt Controller) looks at all those...

This thread appears to have a life of its own! Here is my 2 cents worth... Probably worth about that much: If your arrays are initialized as part of the build process and are larger than can fit into RAM1 and as such you need to put them into...

ITCM now gets flagged as read-only in the MPU so the padding isn't writable.

It was always claimed 'Read Only' but worked when last checked with this code last edit Feb 2023. ... // LAST PRINT printf( "End of Free ITCM = %u [%X] \n", ptrFreeITCM + sizeofFreeITCM, ptrFreeITCM + sizeofFreeITCM); // This now causes...

It is (mostly) transparent; when you fetch a byte from PSRAM, the entire 32-byte cacheline containing that byte will be fetched into the cache. Subsequent reads/writes will use the cache until the cacheline is evicted, either manually or by being...

Any idea how this cache works? I'm assuming it would only cache specific memory that it has accessed. My completely untested theory (and probably wrong) was if you were even accessing only 50% of the items out of order in the array on psram it...

A one line CORES edit can make the unused RAM1/ITCM 'padding' available as "READWRITE". In the example above that area is over 30 KB - but can be less than 1KB depending on the build. This risks self(virus)-modifying code or the dangers of...

@jmarsh - was it a post you made showing at least one build/source edit that dropped ITCM code by some measurable amount? Having to do with C++ reservation or other [fault or output stubs?]? It would be best to work on building to reduce the...

@jmarsh p#37 notes details on the cache - ideally the 32KB cache is designed to most effectively afford efficient access with minimal overreading and only writing back changed blocks. Profiling and use case might show the cache being less than...

@Lesept ... @Dogbone06 has put forth a design with 32 MB of SDRAM with PJRC Bootloader. There is a thread or two dedicated to that, as well as some other with display and camera usage. It is based on Teensy MicroMod since it uses a 16 MB Flash...

Depends how the interrupt is 'disabled' - if a higher priority is set for interrupts I think it should only defer for when the priority is reduced again, if the individual specific interrupt is disabled in the mask then clearly it should not...

Are all pins either OUTPUT or INPUT_PULLUP as required to minimize pad power drain? Floating inputs can drain current.

I have recently run into this problem too. What I have found is among the 5 teensy 4.0's I have, the power consumption for the rtc varies wildly. This is measured with no external components for 5 different teensy 4.0's: 2x 92uA, 84uA, 46uA, 27uA...

Thanks! Slowly getting there. Mouser and Digikey have the AK4558 (and others) in stock at about 5€ in single quantities.

inclusion of u8x8.setI2CAddress(0x7a);//0x3d x 2 did the trick. Many thanks all!

Yes. Think of each interrupt (there's a lot of them on the T4; somewhere around 160 iirc) having three possible states: idle, pending and active. Idle means it is not raised. Pending means it has been raised but the CPU hasn't acted on it yet...

The printf() functions should normally warn you when the parameter type doesn’t match, for example “%lu” and time_t, which should be “%llu”. However, the Teensyduino implementation of the Print interface (which contains a printf(), and is the one...

If an interrupt occurs during a period where interrupts are disabled, will it be acted upon immediately when interrupts are enabled? Or is it lost? I suppose this comes down to whether they are edge triggered or level triggered. Example: 1...

Thanks for doing all that work Paul - I have definitely benefitted over the last several years, as I have used T3.2's and T3.5's in many of my projects. In particular, my current 4WD robot uses two T3.5's and a T3.2; one of the T3.5's is the...

One of the other changes I recall, but the details of when and which specific versions are now pretty distant and hazy memory, involved changes to the device discovery protocol. The protocol specifies a way for additional info about discovered...

OK, in Arduino 2.3.2 'Boards Manager, changing from 1.59.0 to 1.57.3 did the trick. I was able to successfully upload my program to Teensy 3.5 via Joe's wonderful OTA code, and it no longer hangs up. The downgrade process in Boards Manager was...

Thanks Paul - I'll give this a whirl tonight and report

Yes. In Boards Manager, 1.57.3 is Teensyduino 1.57. The ".3" means it's the 4th time it's been packaged for Boards Manager (we started with ".0"). It's still the same 1.57 version. Over the last year or so Arduino CLI / IDE has made changes...

if you use malloc or new, by default these will be allocated in RAM2 This is from the T4.1 product page, in the memory section. If you wish to allocate from the PSRAM, you would instead call extmem_malloc.

I'm not sure, but if I understand correctly, 1.57.3 would be Beta #3 of 1.57, and not the release version. I still use IDE 1.8.19, so I'm not very familiar with the 2.x stuff. You should probably wait for someone else to reply. Once you get back...

Hi all! I have found various topics but I would like a definitive clarification on this: I have to draw to various SPI TFT diplays using the ILI9341_t3n library through DMA. So if I put the TFT buffers into EXTMEM (soldering both chips) will the...