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  • manitou's Avatar
    Yesterday, 05:39 PM
    Don't you want to disable and not enable/set PKE?
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-16-2019, 06:12 PM
    Thanks Frank. I fetched your copy of Audio lib and tested MQS with 100 uf cap from pin 12 to speaker and generated 440 hz sine wave // teensy4 mqs frank's audiolib pins 10/12 rt/left // start monitor to hear...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-12-2019, 10:33 PM
    I'm thinking the ILI9488 should have its own thread ....;)
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-12-2019, 10:31 PM
    As @MichaelMeissner notes in post #1668, Adafruit's M4 has QSPI serial flash that is used primarily by circuitpython, but I have played with Adafruit M4 and they also provide a fatfs API...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-11-2019, 02:33 PM
    DCP update: I've updated DCP post #1600 with tests of DCP-accelerated CRC32 and AES CBC.
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-09-2019, 12:24 AM
    I've used these mono amps with 8 ohm speaker https://www.adafruit.com/product/2130 https://www.sparkfun.com/products/11044
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-08-2019, 09:56 PM
    DCP tests The 1050/1060 has a DCP module to accelerate AES, SHA1, SHA256, and CRC32. The NXP SDK has a library (fsl_dcp.c) and simple example boards/evkbimxrt1050/driver_examples/dcp/ and they have extended...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-05-2019, 06:06 PM
    my test sketch #include <FlexIO_t4.h> #include <FlexSPI.h> #define SPIHZ 30000000 //#define HARDWARE_CS #ifdef HARDWARE_CS FlexSPI SPIFLEX(2, 3, 4, 5); // Setup on (int mosiPin, int misoPin, int sckPin, int...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-05-2019, 01:08 PM
    Kurt, my transfer(txbuf,rxbuf,cnt) isn't hanging any more. I still get lots of errors asking for 40mhz (with 160mhz flexio clock) and there is interframe gap. No gaps asking for 30mhz and ALMOST NO ERRORS. I'm...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-05-2019, 12:05 PM
    D cache tests FWIW, I did some tests with D cache on and off (i think), reading data from stack (DTCM), or OCRAM (malloc), or PROGMEM. https://github.com/manitou48/teensy4/tree/master/cachetst 1000 reps of inner...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-03-2019, 10:45 PM
    Kurt, OK commenting out debug stuff got simple sketch running. I still get errors requesting SPI CLK of 15mhz with flex clock @30mhz. no errors for slower SPI CLK speedsl Updated Flex IO speed: 30000000 SPIHZ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-03-2019, 10:08 PM
    Kurt, I fetched your latest from gtihub and i'm running beta8. I see nothing on scope or serial monitor. I tried my earlier sketch, i tried your flexspi_simple example, and your big DMA sketch you posted here. ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-03-2019, 02:25 PM
    flexio PWM Not that we need more PWM pins, but I decided to play with flexio PWM from SDK example boards/evkbimxrt1050/driver_examples/flexio/pwm My small T4 test sketch is at...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-02-2019, 11:44 PM
    I just added txbuf/rxbuf compare after transfer(txbuf,rxbuf,...), and changing while to use tx_count is NOT the solution, get lots of errors (but no hangs). using stock rx_count in while() seems to work error free at...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-02-2019, 10:04 PM
    May not be relevant, but a few days ago I had a flexspi hang problem at high speed https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=196848&viewfull=1#post196848 That "fix" may be just "covering...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-02-2019, 01:22 PM
    Re: 1060 write/read/write I counted cycles and scoped output pin pulse width when doing write/read/write (sort of like shiftIn()) uint32_t t = ARM_DWT_CYCCNT; digitalWriteFast(11, HIGH); int val =...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-01-2019, 07:46 PM
    OK, the 1060 fast GPIO on GPIO6-8 looks good. My scope is probably the limiting factor. So with 10 nop's between toggles I have a nice sine wave on scope (49 Mhz, period 20.4 ns, Vpp 1.68v). Faster toggle rates...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-01-2019, 01:01 PM
    I'll have to check project build settings between 1050 and 1060 ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-01-2019, 12:58 PM
    Ahhh, my test was flawed. I didn't enable via GPR26, but i'm not sure if i still use GPIO1-19 or do i use GPIO6-19 ... i'll have to experiment
    1815 replies | 46220 view(s)
  • manitou's Avatar
    02-01-2019, 12:31 AM
    Re: GPIO performance on 1062 I ran some pin toggle tests on NXP EVKB(1052) and on the NXP 1062 eval board. We count cycles for 8 pin toggles with pin hooked to scope. cycles = ARM_DWT_CYCCNT; ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-30-2019, 01:03 PM
    I edited post #1315
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-30-2019, 12:41 PM
    OK, with beta8, using 16K buffers here are data rates for RAM and OCRAM (malloc), all aligned on 32-byte src 20005280 dst 20001280 DTCM 2383.13 mbs 55 us loop set 2427.26 mbs 54 us ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-30-2019, 11:11 AM
    As part of my benchmarking, I had done memcpy/memset measurements, but they were crazy fast. I decided something was amiss with cache or the core assembler code (memcpy-armv7m.S memset.S), although it was evident the...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-29-2019, 05:27 PM
    Here is a hack (proof-of-concept) of using PIT to clock ADC via XBAR (and ADC_ETC), derived from EVKB SDK example boards/evkbimxrt1050/driver_examples/adc_etc/adc_etc_hardware_trigger_conv/ Reads 12-bit ADC values...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-28-2019, 05:06 PM
    Your 2nd logic analyzer plot seems to show no inter-frame gap (with software controlled CS), but i just fetched your latest from github, and I am still seeing an interframe gap with software CS. Here is scope of...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-28-2019, 04:03 PM
    FWIW, I should have been timing the block transfer. With 8-bit frame, 1024-byte block transfer (null RX buffer) @40mhz, I measure 31.6 mbs. Inter-byte gap 47 ns, the ubiquitous MCU synchronization delay for touching an...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-27-2019, 10:29 PM
    Kurt, i installed/cloned your flexio_T4 stuff and ran the simple SPI example. flexSPI.cpp had wrong name for include file. fixed that and it ran and printed the setup info, but i didn't see any activity on any of pins...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-25-2019, 01:03 AM
    Too bad we can't reproduce the example in that pdf. None of the (6) GPT output pins are available on Teensy 4. GPT1_COMPARE1 GPIO_EMC_35 ALT2 GPT1_COMPARE2 GPIO_EMC_36 ALT2 GPT1_COMPARE3...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-25-2019, 12:28 AM
    Yep, reading an IO register is slow. I measure digitalWriteFast at 3 cycles, and digitalReadFast at 70 us set PIT FLG took 3 cycles, read of PIT FLG took 114 cycles
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-24-2019, 08:48 PM
    Maybe.? In the NXP SDK examples almost every ISR had the dsb, with this comment /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F, Cortex-M7, Cortex-M7F Store immediate overlapping exception return...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-24-2019, 08:03 PM
    Re: double interrupts for your viewing pleasure, here is another scope shot of PIT isr firing twice. scoped pin is set HIGH on entrance to ISR, and LOW just before exit. Adding asm("dsb") or...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-24-2019, 11:27 AM
    There was some followup on PIT ISR latency and double interrupts etc. in https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=195605&viewfull=1#post195605
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-24-2019, 01:10 AM
    OK, I modified startup.c. With optimization Faster, there was no change in coremark performance. With optimization Fastest, rate climbed from 2427.42 to 2428.57. Maybe speedups would be more apparent with sketch that...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-23-2019, 08:25 PM
    What i do to freeze scrolling on SerialPlotter is add a pinMode(pin,INPUT_PULLUP) to sketch, and in loop() i'll fall into while(1); if pin is 0. Then jumper pin to GND to freeze monitor/serialplotter
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-23-2019, 08:05 PM
    Re: encoder+XBAR I downloaded your T4 example from github. When I ran the sketch with a basic rotary encoder https://www.sparkfun.com/products/9117 I saw only 0s from the device. The device has no debounce RC...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-23-2019, 07:51 PM
    How do I do that?
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-23-2019, 06:24 PM
    coremark has a configurable MEM_METHOD (static, heap, stack). Not a big difference in iterations/second with T4@600mhz STACK MALLOC Faster 2295.2 2290.6 Fastest 2426.7 2426.2 linpack 100x100 float...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-23-2019, 05:30 PM
    I'll take a look. I haven't looked that closely at the coremark code. i'll look at linpack benchmark too, big float/double arrays.
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-22-2019, 06:37 PM
    I think you noted core_pins.h had wrong PIN0_PADCONFIG #define CORE_PIN0_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_02 #define CORE_PIN1_PADCONFIG IOMUXC_SW_PAD_CTL_PAD_GPIO_AD_B0_03 I presume you are testing with...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-22-2019, 04:03 PM
    To fetch an SDK zip file you need to set up an account at NXP. https://mcuxpresso.nxp.com/en/welcome Then select board for SDK download, then select to add additional middleware (to get more examples in the SDK),...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-22-2019, 01:28 PM
    FWIW, the NXP SDK has several flexio examples ./boards/evkbimxrt1050/driver_examples/flexio/spi/edma_lpspi_transfer/master/readme.txt...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-22-2019, 02:09 AM
    FWIW, my digital meter thermometer probe touching the 1052 chip reads cooler than what tempmon reports. MCU meter (degrees C) T4 49.6 T4 46.9 38.4 beta2 EVK 35.5 30.7 EVKB 39.4 31.9 1062...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-21-2019, 08:05 PM
    in boards.txt change teensy4b.build.fcpu=396000000 to teensy4b.build.fcpu=600000000 even though F_CPU may not be meaningful for the T4, it would give me a warm comfy feeling ... :o
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-21-2019, 07:59 PM
    Agreed things are hard to find. Do you use "Search Thread" ? that works best. i used that to search for recipe.size and got most of your posts, me thinks.
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-21-2019, 04:03 PM
    Re: SoftwareSerial You could add pin checks for backside UART's. I think it is supposed to work with non-uart pins too, but the code uses F_CPU and cycle counts, so that would need some T4 adjustments. Lib has...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-21-2019, 03:33 PM
    you need to copy teensy3/IPAddress.cpp to teensy4/ ref: https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=195795&viewfull=1#post195795
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-21-2019, 03:31 PM
    Re: TRNG update I configured von neumann sampling in the T4 hardware TRNG, that slowed the production of 512 random bits from 13 ms to 53 ms, but the NIST statistical tests look good with that configuration. ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-20-2019, 11:43 AM
    here is a hack that i used 3 or 4 years ago on LC. maybe you can adapt it to your needs. // dacDMA v6 test DMA out with DAC and timer and DMAChannel on LC // v6 use ch1 DMA and restart DMA ascii plot values // ...
    1 replies | 73 view(s)
  • manitou's Avatar
    01-19-2019, 05:12 PM
    Re: systick, micros, GPT Just one more thought on systick and micros. You could replace the core systick timing with GPT2 timer. GPTx has COMPARE register so can do the 1 ms tick interrupt, and the GPT clock is...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-18-2019, 01:20 AM
    One possible use of GPT1 is for FreqCount (pin 25 is the external trigger). Here is a proof-of-concept (32-bit counter) https://github.com/manitou48/teensy4/blob/master/gpt_count.ino Jumper PWM pin 11 to 25 for...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-17-2019, 03:03 PM
    Your example master and slave work for me. I have 2.2K pullups to 3v3 and a common ground. your photo looked a little ambiguous ?, I presume both edges of the T3.6 were not pushed into same conductive plane of black...
    4 replies | 182 view(s)
  • manitou's Avatar
    01-17-2019, 12:42 AM
    OK, got Ethernet (wiznet 5500) to work on Teensy 4. To eliminate vtable error had to copy teensy3/IPAddress.cpp to teensy4/. Here are my results from beta7 with Kurt's SPI FIFO lib. Speed of wiznet Ethernet will be...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-17-2019, 12:35 AM
    What is the clock setting in your table for first T4 column? I thought default was PODF(6)??
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-16-2019, 03:36 PM
    The FIX: copy teensy3/IPAddress.cpp to teensy4/
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-16-2019, 03:34 PM
    The EVKB SDK had an encoder example (which I believe you tested on the EVKB) that used the XBAR to map GPIO pins to the Encoder A, B, and Index inputs. In fact, i don't think the T4 encoder peripheral has any defined...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-15-2019, 02:15 PM
    With T4 breakout, I checked the PWM waveforms on the backside pins and confirmed PWM on pins 24 and 25 have proper polarity. Also did digitalWrite tests on backside pins, and Rx-Tx tests on Serial6, Serial7, Serial8. ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-15-2019, 12:09 AM
    Thanks. you need to go deeper to find hardware timer that is being used. For example, IntervalTimer uses PIT (maybe all 4 channels), PWM uses some channels of QTIMER and flexPWM timer, IRremote uses flexPWM1 timer,...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 07:57 PM
    Nothing uses GPTn as far as I know ... which goes to Paul's need to have a "timers consumers list" to know what is using which timers (PIT, GPT, QTMR, flexPWM) ... IntervalTimer, Tone, PWM, IRremote ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 07:49 PM
    When i want 1 us resolution micros() i paste in GPT code (have to init GPT in startup() ) but it works in a pinch. https://github.com/manitou48/teensy4/blob/master/gpt_micros.ino There are two GPT timers on T4
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 06:39 PM
    My one data point was that DSB was faster than polling https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=194815&viewfull=1#post194815 but the reference in post #883 suggested DSB may not always work
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 06:20 PM
    Re: double interrupts There were earlier posts about double-interrupts. I had to spin waiting on the interrupt flag to clear. Discussion about dsb at...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 05:47 PM
    ACMP and DAC Here is a simple sketch to demonstrate ACMP using 6-bit DAC as reference/comparison voltage. https://github.com/manitou48/teensy4/blob/master/acmpdac.ino Sketch uses ACMP3-0 which corresponds to A4,...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 01:29 PM
    As I recall ping lib uses pulseIn() which in turn uses micros(). But on T4, micros() only has 10us resolution :( so I wonder how ping distance calculations are affected. (i'd really prefer systick ran at current CPU...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-14-2019, 01:04 PM
    OK, i fetched your new branch and hacked in missing def's (imrxt.h), and serialflash stuff compiled and ran. My other little SPI benchmark was OK too. thanks
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 08:56 PM
    No. I never tried anything like that. My comments about the Arduino tool chain was merely to use the GNU g++ in my Arduino/teensyduino folders to compile EVKB program exported from the mbed on-line compiler. So I was...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 05:12 PM
    Kurt, I was running with your new SPI stuff with missing defintions pasted in, and it was working with my simple SPI sketch. But I just tried to build SerialFlash listfiles example and I get SPI compile errors. ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 04:01 PM
    Sounds like we need an ISR latency study for the T4 .... ISRs in the NXP SDK often had memory barrier (dsb) at end of ISR. On many of my T4 peripheral ISR's i had to spin to wait for ISR register to clear or I would...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 03:12 PM
    As a sanity check, maybe print LPSPI4_CCR to see what divisor really is? what value does ILI9341 lib use to set SPI CLK frequency?
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 02:43 PM
    added it to post #835
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 02:29 PM
    see SPI DMA hack in post #717 https://forum.pjrc.com/threads/54711-Teensy-4-0-First-Beta-Test?p=195192&viewfull=1#post195192 also mentioned above in #826
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 02:24 PM
    ooops, i didn't notice the volatile. but i did notice base count didn't change with dummy in printf, BUT why did 2nd loop slow with dummy in printf ?? Load: 18.718 base 650006.000000 799692 537001948 ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 01:58 PM
    Interesting. How does behavior change with compiler optimizations? Presumably the effect on T3.6 would be about the same on T4. Also, if you print value of dummy in your printf, you may see numbers change. compiler...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 01:41 PM
    Did you use the latest SPI lib with Kurt's FIFO mods. Unless imrxt.h has been updated, you'll need to hack a bit to get Kurt's SPI definitions. I think others have been working on the "optimized" ILI9341. How do your...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 12:25 PM
    OK, I fetched latest SPI lib with Kurt's update (but imrxt.h does not have his additions yet, so some hacking required) but here is summary of SPI performance with FIFO (1000-byte transfer MISO jumpered to MOSI) ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-13-2019, 12:33 AM
    SPI.cpp work to do: I ran SPI test with SerialFlash on T3.4 and T4. Despite T4 clock running at 37 mhz and T3.2 only at 30 mhz, the T3.2 did faster page reads than T4 (83 us vs 129us). T3 SPI lib is optimized to...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 05:37 PM
    You should be able to run SPI at 37.5 mhz (ask for 40 mhz in spisettings). Paul made the choice of 528000000/7. It could be a smaller divider. On the EVKB SDK tests we were using 528000000/5, max SPI clock of 52.8...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 04:49 PM
    Excellent! I was looking at doing that this morning. But you have left too much to the imagination ... can you post/github your demo code?
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 04:35 PM
    This vtable error is some sort of C++ thingee above my old C skills. Here is the simplest program that gets compile errors on T4, works on T3.2. (I believe i have copied in stream.cpp and WString.cpp into my T4 core...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 04:11 PM
    The discrete SPI dividers for 75 mhz are 2,3,4,5 .... which gives SPI CLK of 37.5, 25, 18.75 ... the setClockFreq algorithm picks the divider less than or equal to user-requested frequency
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 04:06 PM
    Yes, I provided setClockFreq snippet (post #454). If you look at the ref manual, the CCR DIV is treated as +2, so if DIV is 0, peripheral clock is divided by 2. If DIV is 1, clock is divided by 3 ... So if you want...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 03:00 AM
    data sheet says max SPI is 10mhz EVK CCR settings for 8mhz 0x696968xx (xx EVK SPI peripheral clock frequency differs from T4) 08 for T4
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-12-2019, 01:14 AM
    Another possible approach would be to compare T3.2 scope of SPI CLK talking to the BME820 to the scope of T4 SPI CLK and see if you can notice gaps or delays that are controlled by CCR. Yes, Paul added code for...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-11-2019, 11:36 PM
    Try setting the SPI clock to 4 mhz or 8mhz in the BME280 lib. The T4 SPI lib at this time does not set any of the timing delays for the various SPI pins (CCR reg). That may be more critical at slow speeds. The EVK...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-11-2019, 08:08 PM
    Thanks, I used your avr_emulation.h file to get my SPI OLED (adafruit SSD1306) to run the 128x32 example on T4. SPI clock request is 8mhz, scope shows 7.57 mhz as expected. Hacked CCR to increase SPI speed. Display...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-11-2019, 12:59 PM
    Maybe Ethernet? I just tried to compile Ethernet udpntp example, i get compile errors, undefined reference to `vtable for IPAddress', but I have other domestic chores in the next few hours ...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-11-2019, 12:02 PM
    I've been running Paul's T4 SPI lib and have had no trouble manually controlling CS with digitalWrite() ??? Successfully talked to SPI Serial flash on prop shield, and watched with scope.
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-11-2019, 11:34 AM
    Ethernet MAC address I'm guessin (since it matches up with Teensy 3 ether mac addresses) this is unique T4 mac address Serial.printf("%04X%08X\n",HW_OCOTP_MAC1,HW_OCOTP_MAC0); 04E9E50186BB my first beta T4 was...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-10-2019, 11:26 PM
    SPI DMA My first cut at simple SPI DMA on T4, transmit only. Checked SPI clocks on scope. Data rate is close to SPI CCR clock rate. https://github.com/manitou48/teensy4/blob/master/spidma.ino SPI CLOCK...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-10-2019, 09:08 PM
    FYI, new T4 beta arrives (#27) to swap out with my impaired unit. New beta unit uploads properly. ;) Only differences I expect are MAC address in fuses and drift in crystals crystal drift (ppm) 24MHz...
    1815 replies | 46220 view(s)
  • manitou's Avatar
    01-10-2019, 06:15 PM
    OK I commented out DMAMEM on the buffer and the sketch worked. github updated 2526 ticks A0 = 11 that's 646656 ADCs/second (res 10, average 1)
    1815 replies | 46220 view(s)
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