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  • ecurtz's Avatar
    08-03-2020, 03:05 PM
    Glad you got it working. I hope that as soon as the upcoming "generic File" stuff from Paul is finalized there will be a push for a more unified library for this stuff.
    6 replies | 200 view(s)
  • ecurtz's Avatar
    08-02-2020, 11:30 PM
    It looks like some of your constants are wrong as well. The registers should be A0, B0, C0 rather than 0A, 0B, 0C
    6 replies | 200 view(s)
  • ecurtz's Avatar
    08-02-2020, 10:21 PM
    I'm pretty sure you should be in SPI mode 0 the whole time rather than switching to mode 3.
    6 replies | 200 view(s)
  • ecurtz's Avatar
    07-21-2020, 05:03 PM
    Q(5) = Green Package (Lead-free, RoHS Compliant, Halogen-free (TBBA), Antimony-Oxide-free Sb2O3) with QE = 1 (fixed) in Status register-2. Backward compatible to FV family. M(6) = Green Package (Lead-free, RoHS...
    50 replies | 918 view(s)
  • ecurtz's Avatar
    07-21-2020, 02:59 AM
    Right click on the .hex file in VSCode and select "Reveal in Finder"
    4 replies | 175 view(s)
  • ecurtz's Avatar
    07-19-2020, 02:56 PM
    After my patented "see what's on GitHub" search process I also thought dhara looked interesting, but whatever Paul is planning in terms of the new file abstraction might make a big difference in the best way to approach...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-18-2020, 04:16 PM
    This is how I understand it. Any of this could be wrong. On the 1062 side CAS is where the 1062 divides a 32 bit address into the column and the page. The value in the LUT defines how many bits are actually sent,...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-18-2020, 03:43 PM
    If CAS isn't set, isn't it going to fail on any address with bit 12 set because those aren't real pages, but ECC sections? What issue were you trying to fix with that change?
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 10:17 PM
    Unfortunately that's not how NAND flash works, you can clear bits from a 1 to 0 but not the other way, so you can't erase a single page, you have to use the block erase command.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 07:29 PM
    Unfortunately erase is per block, so it has to be separate from the write. setTimeout() is treating timeoutAt as a time, but waitForReady() is using it as if it was a period.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 07:06 PM
    There's a bug I forgot to mention in setTimeout / waitForReady. It should probably be updated to just use an ElapsedMillis object and a numerical timeout value? Anyway the version in GitHub is wrong.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 06:10 PM
    Excellent. Hopefully that will be enough of a working baseline to build up the missing features.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 05:58 PM
    Try erasing sector 0 (or the entire chip) first. The addressing was changed so it's unclear what would have been on there previously.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 05:36 PM
    I thought it was broken when I tried to set Column bits to 11 but I think I had just messed up the ECC during my previous testing. So I think that will work with the caveat that we'll have to do some special case code...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 01:23 AM
    Hmm, the column address is 12 bits, but it only "needs" 11 (maybe so you can access the ECC data?) But that means there's no continuous addresses.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-16-2020, 12:45 AM
    Staying with a single page write to try and tackle one issue at a time. There's something address related to the odd/even pages. uint8_t page = 2; Serial.println("Non-Zero Test Write"); for (uint16_t i = 0; i...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 09:37 PM
    There were some problems with the timeouts in the read stuff, so the page wouldn't always make it to the buffer. I think this is another incremental improvement. I seem to be able to write and erase, and have stuff...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 06:19 PM
    This code is definitely loading into the buffer because when I use it for read() I can get back the test sequence that's somewhere on my chip. Who knows where that data might be, but it's saved and this code is putting...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 03:13 PM
    I don't have the 1050 manual, but from the link you posted on page 1 it appears to be using 24bit page address with no dummy bits in the sample code LUT.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 02:53 PM
    Well great, apparently some random thing I did during testing was what managed to get the ProgramExecute working because I 100% for sure have the data stored somewhere on my chip.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 02:31 PM
    Try address 0 instead of 3000, as I said I'm not at all confident about the page addresses, but I currently boot with no write code enabled and get the test sequence...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 01:27 PM
    Made a tiny bit of progress. It seems that the operand on the commands using the page address is wrong. It was originally 0x20. I thought it should be 0x10, since it's only two bytes, but that doesn't work either. With...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 03:49 AM
    It isn't currently formatting, but the chip is initially formatted, and we don't appear to be disturbing that yet. As far as I can tell nothing is actually making it from the on chip buffer to the NAND storage on the...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-15-2020, 01:48 AM
    Sorry I've been AWOL, but I don't think we need Paul just yet. I see a couple bugs and/or potential things to try still, so I'll see if I have any luck playing with it. Several methods using uint16_t for addresses...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-13-2020, 05:30 PM
    It looks like you are trying to write twice to the same page out of order, which I think is forbidden. memset(buffer, 0xFF, 2048); for (uint16_t i = 0; i < 2048; i++) buffer = i; myNAND.writeBytes(4094, buffer,...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-10-2020, 01:26 AM
    I was assuming that it's possible to use TFDR0 and RFDR0 with DMA transfers, but I haven't actually investigated. I'll see if I can figure it out from the datasheet. EDIT: Yeah, you can, per page 1653
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-10-2020, 01:11 AM
    According to the datasheet writing within the chip is approximately 10x slower than reading, but I'm not sure how much of the time is the transfer which is probably the same speed either way. I suspect a lot of the...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 08:26 PM
    Happy to contribute a little. It will be useful to have the support in the official library, so win / win. I think I've successfully read the bad block tables with my normal SPI code, but I haven't ever seen any data in...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 05:25 PM
    flexspi_ip_write in the current GitHub code is definitely wrong, looks like a copy/paste error?
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 04:01 PM
    STOP is different than 0 which is what it's all initialized to, but I'm not sure if that matters - the bug was skipping over a LUT entry, from 40 to 42.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 03:47 PM
    Ok, found a bug in the writeStatusRegister LUT, this is still hacked up, but a big step toward working.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 03:27 PM
    If you're referring to the write enable bit in the status register it automatically gets reset every time you do a "write" command (which is actually a couple different things) "A write disable state occurs upon...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 02:48 PM
    This is seriously hacked up and I'm only trying to write to the on chip buffer and read it back, not even attempting to store the page, but it's doing a little bit better than the stuff from GitHub. I cannot wrap my...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-08-2020, 05:39 AM
    Got my new board and making a tiny bit of progress. It seems like FLEXSPI2_IPCR0 always needs to have an address in the range of flashBaseAddr, probably because that's how it determines the chip select to activate. ...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-07-2020, 09:41 PM
    I'm using SPI1 on a Teensy 4.1 - I had to use SPI1.setCS(38) and SPI1.setMISO(39) before calling SPI1.begin() because I was using those alternate pins, but MOSI and CLK are the same as yours and appear to be the...
    1 replies | 188 view(s)
  • ecurtz's Avatar
    07-07-2020, 04:11 PM
    I'm sure they are very shorthanded right now, so bulk orders may be impossible, but when things return to normal I believe that emailing Robin is the preferred method for getting a quote on larger orders.
    5 replies | 375 view(s)
  • ecurtz's Avatar
    07-06-2020, 03:14 PM
    The ability to write to the protection register is controlled by 3 bits of the status register as shown on the chart on page 16 of the datasheet.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-06-2020, 02:25 PM
    You have to use the write enable command (0x06) to set that bit, you can't do it by writing to the status register. EDIT: Actually maybe that's just for the regular writes and you need to use the Status Register...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-05-2020, 08:43 PM
    Looks like you forgot to include the new code? I should have a new Teensy with the chip on it by the end of the week.
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-05-2020, 05:04 PM
    I understand this, but I thought the basic commands encoded into the lookup table would still mirror the traditional method?
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-05-2020, 04:24 PM
    I assume you've looked at the example LUTs in sections 27.6.5 and 27.6.3 in the reference manual? I'm trying to get the HW guy to build me up a 4.1 so I can help, since I think the WSON package is beyond my skill level...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    07-03-2020, 07:40 PM
    Great job! Can anyone confirm that my reading of the datasheet that "regular" SPI can't use the lookup tables and so we'll need two versions of the low level calls correct?
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    06-30-2020, 03:31 PM
    As I said I unfortunately began by hacking on a GPL codebase so I shouldn't just post code without carefully verifying that it's actually stuff that I wrote, but here are a few snippets to help get started verifying the...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    06-27-2020, 02:57 PM
    Paul mentioned adding some "official" NAND flash support in the 1.53 Beta #2 thread, initially targeting the Winbond W25N01GVZE1G. Since I'm using that in my current project and I haven't seen a planning thread I...
    158 replies | 3380 view(s)
  • ecurtz's Avatar
    06-19-2020, 04:31 PM
    Is a potential change to an abstract base File still on the table for 1.53 as mentioned here?...
    48 replies | 2629 view(s)
  • ecurtz's Avatar
    06-13-2020, 07:35 PM
    .text.itcm : { . = . + 32; /* MPU to trap NULL pointer deref */ *(.fastrun) *(.text*) . = ALIGN(16); } > ITCM AT> FLASH From https://github.com/PaulStoffregen/cores/blob/master/teensy4/imxrt1062.ld I only...
    21 replies | 544 view(s)
  • ecurtz's Avatar
    06-13-2020, 03:57 PM
    All the code on the Teensy 4/4.1 is running from RAM by default. There's a big thread about how exactly the RAM sections on the IMXRT1062 work here:...
    21 replies | 544 view(s)
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