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  • floating.'s Avatar
    05-05-2018, 12:30 AM
    Thanks, I got it now. Initially, I just looked at the initialization code, not the comments. But after reading everything, including the errata, looks to me not using the PIT for DMA triggering is probably the best...
    4 replies | 209 view(s)
  • floating.'s Avatar
    05-04-2018, 07:38 PM
    Sorry, forgot to mention that I'm using a Teensy 3.2, but I'll look in the K66 manual to see if I can find a comparable section in the K20 manual. I already looked at the intervaltimer source, but that only uses the...
    4 replies | 209 view(s)
  • floating.'s Avatar
    05-04-2018, 05:07 PM
    As per PIT documentation: 37.1.2 Features The main features of this block are: Ability of timers to generate DMA trigger pulses Ability of timers to generate interrupts Maskable interrupts Independent...
    4 replies | 209 view(s)
  • floating.'s Avatar
    04-29-2018, 05:39 AM
    Removing power should reset everything not written into flash or eeprom, and reprogramming your teensy should clear and rewrite whatever your had in flash. If this happens only on a single pin just don't use that. ...
    7 replies | 248 view(s)
  • floating.'s Avatar
    04-23-2018, 08:40 PM
    Thanks. I did some approximate measurements with a scope and got comparable results. It took about 660 ns for the output to start to change, and depending on he target level, it got within 10% of that level within...
    5 replies | 258 view(s)
  • floating.'s Avatar
    04-23-2018, 06:12 PM
    Does anyone know the time it takes from a write to the DAC for the output to reflect that? This is the relevant code -- no DMA or anything fancy. The interrupt handler works fine, and I know that it gets called...
    5 replies | 258 view(s)
  • floating.'s Avatar
    04-22-2018, 05:48 AM
    Did you try the "47k - 68k resistor to ground at the 3.5mm mini-jack connector" ? (before the caps, between 2,3 and analog GND) If you worry that it will have some impact on the audio, you could try something a bit...
    13 replies | 883 view(s)
  • floating.'s Avatar
    04-20-2018, 09:56 PM
    The 'second' starts 90 ns before indicated by the rising edge of the 1 PPS signal, so if I want slot and bit timing precisely aligned, somehow I need to take that 90 ns into account. One possibility is that I might...
    6 replies | 298 view(s)
  • floating.'s Avatar
    04-20-2018, 04:55 PM
    I'm working on a project that receives a 1 PPS clock signal from a GPS module, and uses that to slot align data packets. However, the rising edge of the 1 PPS pulse has a 90 nanoseconds delay, and somehow I need to...
    6 replies | 298 view(s)
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PIT and DMA 05-05-2018 12:30 AM
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