Sure, here it is. It is titled 816x in the datasheet, the last digit is 6, 7, or 8 for speeds 250ksps, 500ksps, or 1Msps. There is an eval kit at the bottom of the page.
...
Hi, I know the question has come up a few times. But, here we are in 2023 and many analog-digitcal-converters support dual and/or quad sdo. I suppose the same might apply to sdi. It is vitally important because it...
@KurtE
HI, any chance of a simpler example? The business of routing through xbar seems a special case, from using so many pins. I could crib from what you have done, but when I get to that part I am stuck. I...
@PaulStoffregen,
Hi Paul, thanks. The piece from miciwan, makes it seem almost easy. I think I understand how to setup the shifters. But so far I haven't see a clear description of how to set up the clock. The...
@miciwan I just read your document on the wiki for the third time. It's great, really super helpful. But, do you have some examples other than the 12 bit wide transfer?
It would be great if you could perhaps...
Hi, I am about to start a new design using the Teensy 4.0. I would like to ask and double check that it is realistic and feasible.
The board will have four ADC's and one DAC. The five devices would be connected...
@jmarsh Thank you, that of course makes perfect sense. It's video. I was thinking only about the spi interface. The original question was to try to increase the limit on the FlexIO SPI from 30MHz.
Here is a...
Ahh, of course. Toooo simple. And yet, why not just enter a frequency and let it figure it out? Some other lower level call like set_clk_(..) can get the nitty gritty.
Thank you.
@jmarshm, oh, ok, great, thank you. What are the ranges of values for num and den? is there a particular meaning for the names num and den that would help me understand the code?
@jmarsh Thank you, The call set_ck() seems like it might do it, but it is entangled with the video controls. Do you have an example code that only sets the clock?
Or putting it another way, for the call from...
@KurtE
In KurtE's FlexIO page at github, it seems to say the default clock rate for the FlexIO is 30MHz. And, it offers the following which seems to change the master clock for the FlexIO.
void...
This is a single board that hosts a linear CCD with analog front end and a Teensy 4.0. The analog section provides shift, invert and gain to match the full swing (dark to saturation) from the CCD to the input range of...
This a two board solution for a CCD spectrometer. The mother board hosts a Teensy 4.0 with a differential receiver and 16-bit ADC. There is a daughter card for each of the supported Linear CCDs (Toshiba, Sony,...
So, what is the status of the FlexIOSPI?
What is the maximum speed for FlexIOSPI?
What is the setup time for each transfer?
Thank you
(Referring to earlier posts in this thread, yes the SPI with ADC is...
Doctorate in Chemistry and Physics, former faculty in Materials Science at a big ten school, scientist in x-ray diffraction, spectroscopy and instrumentation at a National Lab. Currently working on lasing, lighting and quantum information applications in organic semiconductors.
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