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  • ossi's Avatar
    03-30-2019, 03:23 PM
    ossi replied to a thread Change SampleRate in Audio Projects
    in analog.c i made tzhe following change: //#elif F_BUS == 60000000 // #define ADC_CFG1_16BIT ADC_CFG1_ADIV(2) + ADC_CFG1_ADICLK(1) // 7.5 MHz // #define ADC_CFG1_12BIT ADC_CFG1_ADIV(1) + ADC_CFG1_ADICLK(1) // 15...
    11 replies | 348 view(s)
  • ossi's Avatar
    03-27-2019, 05:28 PM
    @Frank Have you ever considered using ADCs and DACs instead of SGTL5000. At least there should be no twinpeaks problem.
    196 replies | 47102 view(s)
  • ossi's Avatar
    03-27-2019, 01:34 PM
    ossi replied to a thread Change SampleRate in Audio Projects
    It seems changing the CFG1 setting in analog.c and pdb_period in pdb.h does the trick. Thanks.
    11 replies | 348 view(s)
  • ossi's Avatar
    03-27-2019, 08:14 AM
    ossi replied to a thread Change SampleRate in Audio Projects
    In input_adcs.cpp I see where the trigger rate of the ADCs is set to 44100 but I can not see where the ADC conversion clock is specified. Playing with analogReadAveraging(x) had no positive effect.
    11 replies | 348 view(s)
  • ossi's Avatar
    03-26-2019, 06:34 PM
    ossi replied to a thread Change SampleRate in Audio Projects
    The Method to change the I2S clock only works for the SGTL5000 as far as I see. The DAC and ADC timing is specified by the parameter PDB_PERIOD from pdb.h. Changing this from 1360 to 3000 makes the Sample rate...
    11 replies | 348 view(s)
  • ossi's Avatar
    03-26-2019, 03:05 PM
    ossi replied to a thread Change SampleRate in Audio Projects
    So far I found that I had to change the constant 1360 in pdb.h #elif F_BUS == 60000000 #define PDB_PERIOD (1360-1) I could make the ADC clock a little slower, but not faster ( I want to go from 44100 to 96000...
    11 replies | 348 view(s)
  • ossi's Avatar
    03-25-2019, 12:39 PM
    ossi started a thread Change SampleRate in Audio Projects
    I have a setup consisting of the DACs as source. These deliver their data via a recordQueue to my program. My program does some filtering and puts the output data to playQueues. The data then goes to the DACs. So there...
    11 replies | 348 view(s)
  • ossi's Avatar
    03-23-2019, 05:44 PM
    That would mean that all stereo applications (as well as SDR applications) suffer from this erratic behaviour ?
    2 replies | 100 view(s)
  • ossi's Avatar
    03-23-2019, 04:21 PM
    The program given below shows a behaviour that I don't understand. The Intention is as follows: Data from Left and Right channel ADCs in SGTL5000 is directly copied to the Left and Right DACs in SGTL5000 and also to the...
    2 replies | 100 view(s)
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