Dogbone06

@Rezo maybe you know more? You ran RGB at 24 bits.

Made an interesting discovery: it's possible to initialize the SDRAM even before any code gets executed, by filling out a DCD (Device Configuration Data) struct. The ROM processes it and takes care of programming all the SEMC registers when the...

That’s awesome! Good work :D

Here is the SDRAM board and ER-TFTM101-1 TFT working in 8080 8-bit mode. It's a start:) Waiting on some info to try out 16-bit 8080 mode...

I appreciate that you posted the working code. Good sport!

It was a RTFM failure on my end. The mention of the missing AudioMemoryCall() made me start again. I had indeed not included all of the audio setup. I was working from the Audio Design tool, not the tutorial sketches which was a mistake. Sorry...

Hi Defragster - I am using @jmarsh's SDRAM_EXTMEM library. I only had to modify one sketch that was setup for the T41. The rest of them work out of the box. The sketch that I modified was "flexio_vga.ino" which basically just changed the VSYNC...

I'm not really sure why this is necessary? Both boards have B1_12 & B1_13 and they're not referred to by Teensy pin number (only their pin matrix code and FlexIO ID), so making them dependent on the platform doesn't make much sense to me...

Unless I missed something both B0_12 (35) and B0_13 (34) did not respond to a pin check with and LED connected to them. Just rechecked and they are not connected as well as pin B1_02 (36) and B1_03 (37). The only pin that is labeled as a T41 pin...

Just re-did it all and it's working :D Must have messed up on the wiring. Probably one off. It now works out of the box...

If those pins are not responding but adjacent pins are, then there is a hardware issue with the board, bad BGA soldering from the production run. @Dogbone06 FYI

First simple experiment on SDRAM board works. Adapted my 4-bit VGA library based on @jmarsh's driver to the dev board. Just had to change two pin defines for FlexIo2 for HSYNC and VSYNC which is used in several places in the FlexIO begin method...

Hello, I’m on the hunt for an all-in-one SGTL5000 and Amplofier in one PCB. There are such boards from Adafruit and others. But they don’t use the SGTL5000. I’m all new to audio stuff. Appreciate any input. Thanks!

Or use a 🔨 😉 Not sure what temperature solder that was used. Mine was a bit stubborn coming off, so I partially cut it off...

The solder paste used on these boards are high temp 260c, it's actually very good solder. But to get something off you need a good iron and some flux. Or add a little more solder paste from a siringe (the latter is the best and easiest option)...

In the pic above it is the SPEC below the red squiggle here over the 1062 Not so small if you zoom in :) - next to organic sugar and Kosher salt. Add flux or put solder blob on solder tip maybe and it should wipe away easily enough and then...

Awesome it arrived and works! V4.0 is the same so far as all else here. See this post on prior page: https://forum.pjrc.com/index.php?threads/call-to-arms-teensy-sdram-true.73898/post-340933 If you get any SDRAM integrity issues that lone cap...

Thanks, I do have that document. I ran the oneScanCaps.ino sketch and most of the frequencies had no errors. Interestingly enough 166MHz had one error. I am not sure which cap DQS has on the board. I can barely see it even with a magnifying...

Just received the sdram development board today:D I ran through all of the test programs that I know about without a problem. I need to make sure I have all of the pinout info for this board. It is a version 4 board. I thought I would start out...

Not sure, but most of their carrier boards, have something like: That is from their ATP board schematic. As for AREF, don't see that on their stuff. With Teensy it is probably geared more to the 3.3v pin. I don't believe raw VIN is passed to...

To be honest im not sure either. Why would you need to know supply voltage if it won't work with anything much less than 3.3v? Also if it's battery powered there will be a DC-DC converter providing a stable 3.3v regardless of cell voltage...

What I'm wondering is why would Sparkfun connect the pin that way (on the micromod) in the first place though? Since it can't be used as a regular IO pin if it's hardwired to a constant voltage... nor can it be used in analog mode to monitor VIN...

Finally got around to sitting down and mapping out all the exposed pins properly and found something odd - there's a pin labelled BATT_VIN/22/A8. My first thought: "how can this pin be both BATT_VIN and an I/O pin?" The answer is it can't/isn't...

Somewhere in history back @mjs513 posted these images of the bare DevBoard I got and scanned associated with the pin names. These are in the DOCS folder of the original github by @defragster that got abandoned when the lib was forked ... not sure...

We copied the Micromod pin pad labels, that's why it says BATT_IN - it's a Micromod label. It is wired to 3.3v on the ATP board and any other MM carrier board with a voltage divider. But it's just a GPIO, so can be used for anything else on the...

Hi I try to understand this library. Most of the things are understandable. But I was not yet able to figure out, what this function does:wdt.expired(); Is it usable in the loop function of my program, or is it just used by some other functions...

That looks impressive!! Whats the resolution on that? I see you are wired in an 8 bit bus, and you mentioned DMA (which the original lib didn’t support as it used FlexIO3) I assume you split the data on FlexIO1 or FlexIO2 port? BTW a logic...

Hi Rezo, it's 1024x600. It is a good display. My vision is not good enough for anything much smaller than this display. I have not set up DMA yet. It is still using FlexIO3. Still not that familiar with using FlexIO with DMA. More to learn and...

Well I finally ordered the Buydisplay ER-TFTM101-1 with capacitive touch and had it configured for parallel communication in 8080 mode. Using parts of @Rezo's ILI984x_t41_p library, I was able to adapt my Ra8876LiteTeensy library to use the...

Seems to have been working ,,, just sent you a PM with image and a sketch?

Interesting - perhaps that is something unique to Sr+ - AddOn's not the same as the old forum - perhaps that is one. @BriComp - I'll add you to PM noted above to see if different? PM conversation for SDRAM on DevBoard seems to allow drag and drop...

Okay confirmed - as a Sr+ drag and drop works for @defragster - mistakenly thought others had dropped too - where @mjs513 and @KurtE are also Sr+ and they may have managed as well on that PM thread. Doing the SDRAM @Dogbone06 has also been on...

This is not true. Lockable Teensy (when permanently set to secure mode) will reappear after power cycling in USB bootloader mode if the flash memory gets corrupted, either by a failed upload or any other cause that alters even 1 byte of the...

That's nice to know, I didn't know that. Haven't used any locked Teensy for real world use yet. I just tested it and you are right, a "bricked" (locked) Teensy will in fact reappear and can successfully be flashed. This is very good! But for an...

Perhaps the "loader utility" that is contained in the 2nd part of the EHEX file is not needed when the update is done via FlasherX, i.e. from within an application that has already passed the "security barrier"? I know so little about the locked...

I guess we'll never truly know as this is secret stuff. I am just happy that FlasherX can use the EHEX when removing the last part. I use FlasherX for everything these days, it's so conveniant and safe to have the device update itself. Using the...

Here's something interesting. I use FlasherX as mentioned before. I just did something dirty, I removed the second part of the EHEX EOF. Meaning, I removed the 200ish lines after the first EOF. And then had FlasherX use that EHEX to update my...

Meanwhiles, for anyones enjoyment, here is a video of a music player demo running on LVGL v9.0.0 I think there is a lot of room left to optimize. It has two screen sized frame buffers (1.3Mb each) that LVGL writes into, and the eLCDIF reads from...

Quick general question - can the SEMC/SDRAM read data from one address (using DMA for example) and write to another address at the same time?

I made quick note somewhere on past pages with initial speed results showing longer at faster - but not seen with current test. Another thing the 'OneScanCap.ino' occasionally shows is an added 3 seconds to all times across the tests between one...

Sorry been distracted today for a bunch of reasons. Reran the tests but added the time to copy the array DMAMEM to EXTMEM: 0 errors, 1010 microseconds to copy DMAMEM to DMAMEM: 0 errors, 319 microseconds to copy RAMMEM to RAMMEM: 0 errors...

🤔I have not seen the problem of using the 8MBtye SDRam on the GIGA for the camera to read into. But when I looked at their schematic their SDRam setup looks very different than what I believe you are doing on these dev boards. That is they...

That looks pretty much the same as Dogbone's devboard to me - 16 bits of data, 2 bank pins, row and column addresses are sent multiplexed on A0-A12.

Okay, Thanks. Something else then ... MCU cycling faster and leaving the SDRAM behind it seems ...

Thanks Paul for giving us an answer! :giggle:

Confirm, I generally don't comment on this code security stuff beyond the info already published on the code security web page and in the core library code, the 3 automatically generated programs and Arduino IDE plugin code. The NDA and...

Confirmed. Even with Verify the Teensy.exe grabs/reuses .eHex part #2 when it is missing. But Close and Open Teensy.exe and point to an .eHex with No part #2 and: Still interesting that .eHex part #2 is marginally unique - but any .eHex part...

@PaulStoffregen, I would very much appreciate if you can reply to the questions that @joepasquariello wrote above. I suspect there may be NDA stuff prohibiting you from doing that, if that's the case then please let me know. Thanks! 🙏

As for the problems at MCU F_CPU over 600 MHz - perhaps it is these likely these ns_to_clocks() timing based values not adjusting for enhanced F_CPU_ACTUAL clock rates so recovery times are being violated ? // configure SDRAM parameters...

I set it to 1 and skipped 133 as I figured there was no point in testing it - we know it works