GPT timer clock selections
@manitou - Yup, the RTC looks to be that little tin at the side of the reset button. Cute. I was mentally expecting a round long tin for RTC. Habits...
The reason for lack of option 5 on GPT_CR clock selection is simple... there's another gate in the same GPT_CR register on bit 10 which enables 24M directly from the crystal. Once that is enabled, then both 150 and 24 MHz are available together for selection. I presume all this clock gating is to minimise the power consumption and lower the core temperature when stuff not needed.
So my simple code to enable 150 MHz ended up gating clocks on GPTs and PITs only, during the switch over of the mux. Attached for what its worth. GPT1_CNT and GPT2_CNT can then be read at leisure.
Code:
//set clock gating registers to inhibit GPT and PIT clocks
Save1 = CCM_CCGR0; //save current state 0
Save2 = CCM_CCGR1; //save current state 1
CCM_CCGR0 &= 0xF0FFFFFF; //inhibit GPT2 (CG12,CG13)
CCM_CCGR1 &= 0xFF0FCFFF; //inhibit GPT1 and PIT (CG6,CG10,CG11)
//change the mux setting for IPG_CLK_ROOT (set bit6 = 0)
CCM_CSCMR1 &= 0xFFFFFFBF;
//restore GPT and PIT gated clocks
CCM_CCGR0 = Save1;
CCM_CCGR1 = Save2;
//configure clocks for GPT modules
CCM_CCGR0 |= 0x0F000000; //enable clocks to GPT2 (CG12,CG13)
CCM_CCGR1 |= 0x00F00000; //enable clocks to GPT1 (CG10,CG11)
//configure GPT1 for test
GPT1_CR = 0; //clear the control register
GPT1_IR = 0; //disable all interrupts
GPT1_SR = 0x3F; //clear all prior status
GPT1_PR = 0; //prescale register set divide by 1
GPT1_CR |= GPT_CR_CLKSRC(2); //clock selection (150 MHz)
GPT1_CR |= GPT_CR_ENMOD; //reset count to zero before enabling
GPT1_CR |= GPT_CR_EN_24M; //enable the 24 MHz clock option
GPT1_CR |= GPT_CR_EN; //enable GPT1 counting at 150 MHz
//configure GPT2 for test
GPT2_CR = 0; //clear the control register
GPT2_IR = 0; //disable all interrupts
GPT2_SR = 0x3F; //clear all prior status
GPT2_PR = 0; //prescale register set divide by 1
GPT2_CR |= GPT_CR_CLKSRC(5); //clock selection (24 MHz)
GPT2_CR |= GPT_CR_ENMOD; //reset count to zero before enabling
GPT2_CR |= GPT_CR_EN_24M; //enable the 24 MHz clock option
GPT2_CR |= GPT_CR_EN; //enable GPT2 counting at 24 MHz
