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    Actually not really. Corrected errors in data...

    Actually not really. Corrected errors in data block transfers for mulitpage and fullpage writes/reads. Only about half or less of block was being written or read before. Probably affects full chip...
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    All Just pushed a change to the driver. Should...

    All
    Just pushed a change to the driver. Should cover page crossings for any size array you want to use or any address start position. Made it so you dont have to do anything special except to...
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    @defragster right now I using the IDE plus using...

    @defragster
    right now I using the IDE plus using SublimeText as the editor instead of the IDE editor. Did want to spend time on figuring out TSET just yet. Too many new things get me confused :)
    ...
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    Just did an update to the repository. Created...

    Just did an update to the repository.

    Created one function call for flash writes which should address crossing page boundaries whether they are 2 partial writes. New Function:

    ...
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    Actually found another issue! Had to do with...

    Actually found another issue!

    Had to do with crossing page boundaries. Since I decided to test with 4096 with is 2 pages of data you have to load 1 page write it and then load the second page and...
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    no more spew :) Fixe addressing with ecc turned...

    no more spew :) Fixe addressing with ecc turned on pageSize = dataBytes + eccBytes = 2048+64 = 2112 bytes. Made that adjustment and increased the x42 buffer to 4096:

    Begin Init

    Found W25N01G...
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    Got it now - now using DMA to transfer to the...

    Got it now - now using DMA to transfer to the chip but for the transfers to and from the FIFO.
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    Think DMA would only help if you are using SPI...

    Think DMA would only help if you are using SPI for transfers but I could be wrong here as opposed to QSPI. Maybe somebody else has a better explanation.
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    Only thing I can think of is that it reading and...

    Only thing I can think of is that it reading and blocks so times are probably going to be similar. Both are using QPI by the way.

    From what I was reading about this chip that seems to be what...
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    Thanks for testing @defragster and doing the...

    Thanks for testing @defragster and doing the sketch updates

    Actually did the same thing putting a check42 at the beginning of the sketch but didn't make it permanent.

    Not sure what else to do...
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    Added check42: Begin Init Found W25N01G...

    Added check42:

    Begin Init

    Found W25N01G Flash Chip

    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,...
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    @defragster Forgot to mention - designed so you...

    @defragster
    Forgot to mention - designed so you start you addressing at 0. No need to account for flashbaseaddr - done in software :)

    EDIT:
    Oh forgot the most important thing - doesn't support...
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    @KurtE Don't worry - still plenty I don't...

    @KurtE
    Don't worry - still plenty I don't understand about this chip - Bad Block management and memory addressing :)

    Just pushed an up that will hopefully simplify the interface a bit and did a...
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    @defragster - Good Morning. Yes its...

    @defragster - Good Morning.

    Yes its running at the same clock speed as the PSRAM. If i remember right the max speed is 104Mhz.

    Same same for start address.

    Should still work with a...
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    So far used buffered reads tomorrow will test...

    So far used buffered reads tomorrow will test continuous reads/writes which make it more Nor flash like. But think done for today.
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    All For now don't use the following 2 functions:...

    All
    For now don't use the following 2 functions:

    w25n01g_randomProgramDataLoad
    w25n01g_pageProgram


    Reason: If we use randomProgram doesn't seem to update to the new column address so have...
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    Funny, it doesn't like using the short cut load -...

    Funny, it doesn't like using the short cut load - pageProgram. If you change beefy load to:


    EDIT:

    Begin Init

    Found W25N01G Flash Chip

    0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,...
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    Been awhile since I/we played with this - but I...

    Been awhile since I/we played with this - but I was never good with the button mapping. If i remember we originally had them mapped out to more array elements but then we combined buttons.

    Be...
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    Oops deleted one too many lines. Just add the...

    Oops deleted one too many lines.

    Just add the following line to before the geometry structure in defines.h

    //
    typedef uint16_t flashSector_t; Going to push the fix up now.
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    @defragster - thanks. But the credit for finding...

    @defragster - thanks. But the credit for finding the issue that resulted in getting it to work goes to @ecurtz with the bug to writeRegisterFunction and correction for the addr's.

    Doing some...
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    @defragster After corrections: Begin Init ...

    @defragster
    After corrections:

    Begin Init

    Found W25N01G Flash Chip
    0

    Status of reg 0xa0:
    (HEX: ) 0x00, (Binary: )0
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    Actually a couple of errors. It appears that...

    Actually a couple of errors. It appears that after I got it working and did the IDE save it didn't save all the changes. Not sure what happened. What you see was me playing around before i put it...
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    Ok think I got it all fixed now thanks to your 2...

    Ok think I got it all fixed now thanks to your 2 finds. Going to attach it and push it to Github as well for more testing.
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    Thanks missed that, thought I fixed them, wonder...

    Thanks missed that, thought I fixed them, wonder if i did that anyplace else. Oh by the way dont need the stop just checked.
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    Wasn't sure you needed the add the STOP command. ...

    Wasn't sure you needed the add the STOP command. Looking at what we did for W25G128JV the LUTS didn't need the STOP. Not sure why you need so many. But it did fix the issue I was having with 0ing...
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    You shouldnt have to. Let me give it a try and...

    You shouldnt have to. Let me give it a try and see if I can figure anything out. What I did see in play around WREN is 10 on entering but get reset to 8 so maybe thats why you have to go to usding...
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    @defragster - @ecurtz At this point I am pretty...

    @defragster - @ecurtz
    At this point I am pretty much at a loss with the API. Went through it again and made some changes. So now i get all 0's instead of FF's.

    I did add CAS = 16 for column...
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    Been a while since I played with this stuff but...

    Been a while since I played with this stuff but if you look at your data it isn't changing.

    A quick look at the data sheet brought back memories, but if you want the max data rate you are going...
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    @defragster saw it in an example. If I don't...

    @defragster
    saw it in an example. If I don't use it doesn't make a difference. Going to ask a couple of questions as a double check because I think I am confusing myself now.

    Q. FLSHSZ is...
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    @defragster Your soldering job is better than...

    @defragster
    Your soldering job is better than mine.

    The results you show are exactly what I am seeing. Not what I am doing wrong here. Made a few more changes as a test but same results. ...
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    @KurtE See you got back to playing with...

    @KurtE
    See you got back to playing with displays. Unfortunately have no idea where my one and only LC is so can't even give it a try.

    But as you said not sure with these small displays if you...
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    @Xantra Just a quick answer to your question. ...

    @Xantra

    Just a quick answer to your question. As far as I know there is now library that supports the MX25L25635F in QSPI for the T4.1. You would have to develop your own using FLEXSPI which is...
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    Yep. Just reread the section on Write...

    Yep. Just reread the section on Write Protection. As usual reading stuff wrong :)

    WP-E and SR1 are both 0 so that the device is in S/W protect mode and HOLD/WP are multiplexed as IO pins so...
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    You got it - thats what I am trying to clear. ...

    You got it - thats what I am trying to clear. The status register, 0xC0, contains the WEL bit that you use for writes, that is set for the writes. You do have to remember to disable it for reads. ...
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    Think I know what the problem MIGHT be but not...

    Think I know what the problem MIGHT be but not 100% sure.

    One of the things that have to be cleared, it looks like, are the write protection bits in the Protection Status Register. To clear I do...
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    Not sure which is worse, ADC_ETC or NAND :). ...

    Not sure which is worse, ADC_ETC or NAND :).

    Think ADC_ETC may have been worse. At least Paul has the PSRAM and FLASH code as samples to get an idea :)
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    Oops -- heres the attachment. Do you have an...

    Oops -- heres the attachment. Do you have an example sketch that I can use as reference for the calls to library? Just curious.

    Ok sounds good - going forward i will push it up there.
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    Unfortunately there is not an exact mirror. To...

    Unfortunately there is not an exact mirror. To give you an idea check the driver for betaflight: https://github.com/betaflight/betafl...f4135c04afe3fd. It implements both ways.
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    @gotty101 - glad you got it working - looks good...

    @gotty101 - glad you got it working - looks good in the photos.
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    @PaulStoffregen - Great explanation ! You can...

    @PaulStoffregen - Great explanation !

    You can see some of what Paul is talking about if you look at the flexspi_ip_read, flexsp_ip_write and flexspi_ip_command functions in the sketch. Right now...
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    @PaulStoffregen Thanks for getting back to me -...

    @PaulStoffregen
    Thanks for getting back to me - know you are busier than a one-armed paper hanger right now. Gave me a lot to think about. Now to do some more reading and then back to playing -...
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    Ok playing around some more but think I am stuck...

    Ok playing around some more but think I am stuck on LUTs again. So anyone that is a LUT expert wondering if you all could help with a few things.

    In going through the existing code for PSRAM and...
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    @gotty101 You may have to change the display...

    @gotty101

    You may have to change the display timing settings in the registers.h file. Or just a quick look at your lib looks like may be something with vsynch or vsynch functions that i dont see...
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    @KurtE and @Manu As far as I can see both libs...

    @KurtE and @Manu
    As far as I can see both libs are in sync. The master in my fork was updated with all the changes in the branch where @KurtE and I did all the updates. @KurtE thanks for the...
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    Way from any expert here but from what I read and...

    Way from any expert here but from what I read and have reviewed the answer is no LUTs are used with regular Serial. That one lib I referenced lets you do either/or.
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    Think that is one of the things we never got...

    Think that is one of the things we never got around too was checking all the examples sketches to see if they still worked. The lib was kind of overhauled. All the memory stuff was done by...
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    Ok it lives after a successful operation :) and...

    Ok it lives after a successful operation :) and some playing with LUTs, Raw Dump:

    Begin Init

    Status before Reset:
    * FLEXSPI2_RFDR0=00000000
    Status 1: 00
    Binary: 0

    RESET ISSUED
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    Quick status. Not sure I did this right,...

    Quick status. Not sure I did this right, probably not or my chip is not on right :) Here is the start of using FLEXSPI with the NAND chip where the FLASH goes:

    #define LUT0(opcode, pads,...
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    @ecurtz Thanks for posting so I can at least...

    @ecurtz

    Thanks for posting so I can at least do a verification that i did the soldering correct. Will also help when I try to use FLEXSPI :)
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    Just by way of update and warning. Got my NAND...

    Just by way of update and warning.

    Got my NAND chips from Digikey and just soldered up one to a T4.1. Soldering that chip is not easy, at least for me, it was a real challenge to get everything...
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