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Type: Posts; User: manitou

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    There may be an issue with the PIT fix in...

    There may be an issue with the PIT fix in startup.c for 1.48-beta1, see
    https://forum.pjrc.com/threads/57609-Teensyduino-1-48-Beta-1?p=216384&viewfull=1#post216384
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    Paul fixed in startup.c of Teensyduino 1.48 beta...

    Paul fixed in startup.c of Teensyduino 1.48 beta 1
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    I think to disable the PIT you need to clear the...

    I think to disable the PIT you need to clear the bits

    // manitou suggested PIT fix
    CCM_CCGR1 |= CCM_CCGR1_PIT(CCM_CCGR_ON);
    PIT_TCTRL0 = 0;
    PIT_TCTRL1 = 0;
    PIT_TCTRL2 = 0;
    ...
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    A feature? Though 1052 and 1062 both have PIT...

    A feature?

    Though 1052 and 1062 both have PIT "lifetime" timer capability (chained channel 0 and 1), only the 1062 is configured to start the lifetime timer as soon as PIT is enabled in CCM_CCGR1....
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    Latest observation of 1052 and 1062 with NXP SDK...

    Latest observation of 1052 and 1062 with NXP SDK (MCUXpresso IDE). A PIT timer example on the 1052 has all TCTRL and LDVAL values 0. On the 1062 eval board, the PIT example starts with channels 0...
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    Inconclusive results for NXP eval boards. The...

    Inconclusive results for NXP eval boards. The mbed core uses the PIT timer for us_ticker() with EVKB 1052 eval board, and with the 1062 eval board the NXP SDK is using the PIT for microseconds(). ...
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    latest observation: In setup() I printed out the...

    latest observation: In setup() I printed out the TCTRLx registers on T4B1 (beta 1052), and all values are 0. (1.8.8 1.47-beta1)

    Hardware or software ?? i'll test with NXP EVKB boards and mbed...
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    maybe the following is a suitable FIX in...

    maybe the following is a suitable FIX in hardware/teensy/avr/cores/teensy4/IntervalTimer.cpp

    ...
    } else {
    CCM_CCGR1 |= CCM_CCGR1_PIT(CCM_CCGR_ON);
    //__asm__ volatile("nop");...
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    Strange. for some reason TCTRL0 and TCTRL1 have...

    Strange. for some reason TCTRL0 and TCTRL1 have non-zero values (power on should set them to 0). I haven't yet found where in the core those registers are set. here is my test sketch

    #define...
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