rajiv.tctech
Member
This is what I need to realize:
1. Digitize an incoming 'chirp' consisting of 1 microsecond pulses of varying amplitude between +/- 1VDC (2VDC p-p) @ 5 Mega Samples Per Second (MSPS) and store the values to RAM. The chirps repeat every, say 500 to 1200 microseconds, signaled by a 1 us sync pulse on another line. This sync pulse can be taken as a reference for the start of digitization.
2. After a delay of, say 368 microseconds, reproduce the digitized data in RAM, back to the +/- 1VDC chirp @ 5 MSPS, via an R2R ladder or DAC.
3. Meanwhile, while the first lot of data from the first chirp is being reproduced after a set delay, a new chirp comes up for digitization... and so on.
My questions:
(a) Can the Teensy 4.0 ADC digitize at 5 MSPS? Can it do better than that, so I get higher resolution?
(b) Is the Teensy 4.0 GPIO laid out in port-wise fashion, that can enable parallel data to be exchanged with a 2nd Teensy, without losing cycles to shifting and other boolean tricks to exchange an 8-bit word between GPIOs?
(b) I have no problem using dual Teensy 4s to realize this - one for digitizing the data and parallel transfer to the 2nd Teensy. And the 2nd Teensy for reproducing the 'chirp' after the preset delay. The sync pulse will keep the two in sync.
I come from Arduino, ESP32 and Raspberry Pi and this is the first time I will be using a Teensy 4.0. I look forward to advice on how to tackle this project with the Teensy 4.0, which seems to me, the only solution.
1. Digitize an incoming 'chirp' consisting of 1 microsecond pulses of varying amplitude between +/- 1VDC (2VDC p-p) @ 5 Mega Samples Per Second (MSPS) and store the values to RAM. The chirps repeat every, say 500 to 1200 microseconds, signaled by a 1 us sync pulse on another line. This sync pulse can be taken as a reference for the start of digitization.
2. After a delay of, say 368 microseconds, reproduce the digitized data in RAM, back to the +/- 1VDC chirp @ 5 MSPS, via an R2R ladder or DAC.
3. Meanwhile, while the first lot of data from the first chirp is being reproduced after a set delay, a new chirp comes up for digitization... and so on.
My questions:
(a) Can the Teensy 4.0 ADC digitize at 5 MSPS? Can it do better than that, so I get higher resolution?
(b) Is the Teensy 4.0 GPIO laid out in port-wise fashion, that can enable parallel data to be exchanged with a 2nd Teensy, without losing cycles to shifting and other boolean tricks to exchange an 8-bit word between GPIOs?
(b) I have no problem using dual Teensy 4s to realize this - one for digitizing the data and parallel transfer to the 2nd Teensy. And the 2nd Teensy for reproducing the 'chirp' after the preset delay. The sync pulse will keep the two in sync.
I come from Arduino, ESP32 and Raspberry Pi and this is the first time I will be using a Teensy 4.0. I look forward to advice on how to tackle this project with the Teensy 4.0, which seems to me, the only solution.