Serial line break detection

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Ward

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I'm trying to use UART0 for reception of DMX512, a standard widely used in the entertainment industry for lighting control. Briefly, it's an RS-485 protocol, 250 kBaud. The structure is straightforward: 8 data bits, one start bit, two stop bits, 0-10 ms between bytes. Start of frame is indicated by at least 22 consecutive low bits, essentially a line break, and that's where I'm running into trouble. The Kinetis UARTs have line break detection that's designed for exactly this sort of scenario, however in reading the datasheet it looks like enabling that function (LBKDE) disables the read ready flag (RDRF) which is fundamental to the operation of UART0's FIFO. My question is: has anyone successfully used the line break detection functionality along with the FIFO? I think I found an alternate route, using the framing error flag to detect the missing stop bit. It works, but it pains me to do that...just doesn't seem like the right way to go about it. There are other options, involving additional GPIOs and timer/counters, but again, that seems like more complexity than is warranted. Thanks in advance for any help.
 
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