EZ Port for in the field programming?

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potatotron

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I've got a Teensy 3.0 project that will require periodic fields firmware upgrades, by extremely nontechnical users.

The simplest method I've thought of so far is saving the new code's .hex file to SD cards, and adding a SD card reader + secondary MCU (an ATTiny?) to the Teensy circuit. The 2nd CPU would read the file off the card and program it into the main MK20's flash via the EZ Port SPI interface.

As far as I can tell, most of the EZ Port pins overlap the JTAG pins so I'd have to make a custom board using a PJRC Mini54 (for initial programming and debugging etc.) and a blank MK20:

EZ Port Clock - pin 22 / PTA0 - JTAG clock - Mini P0.5 & P0.6
EZ Port Data In - pin 23 / PTA1 - JTAG Data In - Mini P0.0
EZ Port Data Out - pin 24 / PTA2 - JTAG Data Out - Mini P0.1
EZ Port CS - pin 26 / PTA4 - Teensy port D33
Reset - pin 34

Do I need to do anything else for EZ Port programming, or will there be any conflicts using the pins for both EZ Port & JTAG (not at the same time), or can anyone think of an easier way to do this?

Thanks in advance for any help.
 
The Mini54 chip, if present, will control those pins. If you want to also connect some other device to use them, you'll probably need to add hardware to mux the pins between the Mini54 and whatever else you connect. The Mini54 would have no awareness of this process, so you might also need to design in a mechanism that resets the Mini54 when you switch the mux back to give the Mini54 access.
 
Thanks for the tips Paul, I'll use something like a 74hc125 to control who gets access.

So with that, I think this means I just need to hold D33 (pin 26) to ground, reset the MK20, and I'll enter EZ Port mode so I can reprogram?

29.2.2 EzPort Chip Select (EZP_CS)
EZP_CS is the chip select for signaling the start and end of serial transfers. If, while EZP_CS is asserted, the microcontroller's reset out signal is negated, EzPort is enabled out of reset; otherwise it is disabled. After EzPort is enabled, asserting EZP_CS commences a serial data transfer, which continues until EZP_CS is negated again. The negation of EZP_CS indicates the current command is finished and resets the EzPort state machine so that it is ready to receive the next command.
 
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