I sure dont mind power consumption, it will be a wallsocket powered applciation in the end.
I've temporarily fixed it with continous and a custom flag in adc_isr, plus mux switching in the adc_isr.. not documented, but seems to work fine..
Originally Posted by
Pedvide
Hello,
Yeah, continuous mode is great if you don't mind about power consumption.
When in continuous mode the ADC is always converting so isComplete always returns 0 (I think, I'm not sure). The best way is to use a custom flag inside the adc_isr. See that analogReadContinuous() gives the last converted value.
Heres my code, it is a complete little performance testenvironment for multichannel realtime audio/controls.
Code:
/*
TESTING Teensy3.1 6 Channel ADC with interupt for low latency applications
Paul Driessen
*/
#include <ADC.h>
ADC adc; // adc object
int rawAudioIn;
int dcAudio;
int audioIn;
int audioOut;
int sampleRate;
int microsPerSample;
elapsedMicros microCount;
elapsedMillis updateDisplay;
int accu=0;
void setup()
{
Serial.begin(38400);
delay(1000);
adc.setAveraging(1); // where not into astrophysics here, no averaging required
adc.setResolution(10); // valid resolutions for singelended adc like this are 8, 10, 12 or 16 bit.
// each resolution comes with it own max speed.
// Note: 16 bit will distort the output easy, I've added no conversion between bit depth buildin ( but it's easy: code it yourself!)
sampleRate=40000 ; // requested samplerate, will result however in 1 uS steppable frequencies!
microsPerSample= 1000000/sampleRate; // thats how we keep pace
analogWriteResolution(12); // max resolution on the output
sei();
for(int t=0; t<40000; t++)
{
accu += adc.analogRead(A0); // get the dc level..
}
dcAudio = accu / 40000;
adc.enableInterrupts();
}
// Stuff for the input sequenser..
byte channel2sc1a[]= {
5, 14, 8, 9, 13, 12, 6, 7, 15, 4,
0, 19, 3, 21, 26, 22};
byte adcChannel[6]={channel2sc1a[A0],
channel2sc1a[A1],
channel2sc1a[A2],
channel2sc1a[A3],
channel2sc1a[A4],
channel2sc1a[A5]};
int adcOutput[6];
byte currentAdcChannel;
volatile byte readySampling;
int adcUsage;
void loop()
{
microCount=0; // hard reset here, compensating wont work, overflow will reoccur repetitively..
currentAdcChannel=0;
readySampling=0;
adc.startContinuous (A0);
//while(!readySampling){}; // adc test, uncomment if needed
int adcMC= microCount;
analogWrite(A14, (audioOut+2048)); // 1uS: write the value from previous calculation
audioIn += (rawAudioIn - dcAudio); // get rid of DC values the easiest way..
//
// E N D O F C O D I N G A R E A
//
// while(microCount<microsPerSample){}
// Display Performance in %
int MC= microCount;
int Performance= (MC*100)/(microsPerSample);
int adcPerformance= (adcMC*100)/(microsPerSample);
if(updateDisplay>1000)
{
Serial.print("Timing frame = ");
Serial.print(microsPerSample);
Serial.println(" uS");
Serial.print("Code usage:");
Serial.print(Performance);
Serial.println("%");
Serial.print("ADC usage:");
Serial.print((adcUsage*100)/(microsPerSample));
Serial.println("%");
Serial.print(adcOutput[0]);Serial.print(" ");
Serial.print(adcOutput[1]);Serial.print(" ");
Serial.print(adcOutput[2]);Serial.print(" ");
Serial.print(adcOutput[3]);Serial.print(" ");
Serial.print(adcOutput[4]);Serial.print(" ");
Serial.print(adcOutput[5]);Serial.println(" ");
Serial.println(" ");
//Serial.println( currentAdcChannel);
//Serial.println( readySampling);
updateDisplay=0;
}
while(microCount<microsPerSample){} // fill our timing budget
}
void adc0_isr(void) {
// ADC0_RA; // ?????????
GPIOC_PTOR = 1<<5;
__disable_irq();
adcOutput[currentAdcChannel]=ADC0_RA;
currentAdcChannel++;
if(currentAdcChannel>5)
{
currentAdcChannel=0;
adc.stopContinuous();
readySampling=1;
adcUsage=microCount;
}else{
ADC0_SC1A = ADC_SC1_AIEN + adcChannel[currentAdcChannel]; // convert next channel..
}
__enable_irq();
}
/*
A single-ended input is selected for conversion through the ADCH channel select bits when the DIFF bit in the
SC1n register is low.
ADC status and control registers 1 (ADC0_SC1A)
ADC0_SC1A
0-4 ADC channel
5 DIFF diff enable
6 AIEN interrutp enable
7 COCO The COCO bit is cleared when the respective SC1n register is written or when the respective Rn register is read.
ADC0_CFG1
7 ADLPC lowpower
6–5 ADIV CLOCKDIVIDER
4 ADLSMP sampletime 0 SHORT / 1 long
3-2 MODE BITDEPTH: 00=8BIT 01=12BIT 10=10BIT 11=BIT
1–0 ADICLK
00 Bus clock.
01 Bus clock divided by 2.
10 Alternate clock (ALTCLK).
11 Asynchronous clock (ADACK). <-- klok start bij opstarten! langzamer
ADC0_CFG1
4 MUXSEL select mux set???
3 ADACKEN Asynchronous clock output enable <-- op 1, start sneller op
2 ADHSC
1-0 long speed sample (when ADSLMP=1)
ADC0_RA
dataresult register
ADC0_SC2
7 ADACT ->verschil met COCO? omgedraaid..
6 ADTRG 0 soft 1 hard
5 ACFE 1 comparator on
4 ACFGT comp
3 ACREN comp
2 DMAEN dma enable
1-0 analog reference select 0 default 1 alt
*/
"Complete" implementation of Teensy 3.0 ADC as a library
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