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Thread: Teensy 3.1 & Teensyduino 1.17 Released

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    Administrator Paul's Avatar
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    Teensy 3.1 & Teensyduino 1.17 Released

    Teensy 3.1 is now available. Full details here:

    http://www.pjrc.com/teensy/teensy31.html

    Edit: Teensyduino 1.17 has also been released, with support for Teensy 3.1, and all the improvements from rc1, rc2, and rc3.

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    Administrator Paul's Avatar
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    Well, OctoWS2811 will be able to run many more LEDs due to the increased RAM. I believe the new limit will be in the 3000 to 4000 range.

    It might be possible to make a 12 channel version, but I currently have no plans to do so.

    The extra DMA channels should allow things like simultaneously running the audio library (when it's published). I'd going to try making a giant LED spectrum analyzer.....

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    Paul - sorry for deleting my post, especially since you took the time to reply to it! I regretted asking such an eager question only moments after your new product announcement, and it also occurred to me that you were stuck with a limit imposed by the number of PWM pins (of which there appear to be only 2 more on the T3.1).

    In any case, this looks like a very exciting improvement on an already fantastic product. And thanks to the addition of gold, now with more "bling" or whatever the cool kids are calling it these days.

  4. #4
    Senior Member PaulStoffregen's Avatar
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    It's perfectly fine to ask questions. That's what the forum is for.

    But on technical questions, I really do prefer to see questions with complete info and bug reports with code & details to reproduce the problem!

  5. #5
    This is fantastic, congratulations!

    It's very nice to see the upgrade to two ADC:s. I noticed there is still only 1 PDB timer. Is it only one of the ADC:s which get hardware triggering or will you be able to control both ADC:s from that one timer?

  6. #6
    Senior Member PaulStoffregen's Avatar
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    The PDB can trigger both ADCs, but both must at the same frequency. Each can have its own delay (eg, phase) within that frequency.

    The ADCs can also be triggered by the PIT or FTM timers. Details buried within the huge manual....

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    Wow! I'm very excited about the two ADCs!!
    I've worked a lot in the ADC library and I can't wait to see how can I get the most out of the two converters. Do you have any ideas of how you'd like to implement it?

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    Senior Member Constantin's Avatar
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    Quote Originally Posted by Paul View Post
    Full details here..
    Hi Paul,

    If you'd like me to make you a Eagle file of the bare chip, could you be so kind and post a schematic with the pin assignments on the chip itself?
    I'll update my Eagle files to create a new entry for the assembled Teensy 3.1 board and try to get it to you this week.

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    Senior Member+ MichaelMeissner's Avatar
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    It looks nice. This will open the door to using color displays.

    Also, the 5v tolerance will be appreciated for the digital pins (though now, I try to buy stuff that is tolerant of both 3.3v and 5v).

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    Very cool new platform, congratulations.

    Does the Mini54 change with this new platform or is it the same? I have a custom hardware design because I needed access to the EZ Port / JTAG pins but am using the PJRC Mini54 for programming. It looks like the Teensy 3.0 is discontinued for the 3.1, do I need to redesign for the new MK20 MCU so I can I keep buying the PJRC programmed Mini54?

  11. #11
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by potatotron View Post
    Does the Mini54 change with this new platform or is it the same? I have a custom hardware design because I needed access to the EZ Port / JTAG pins but am using the PJRC Mini54 for programming. It looks like the Teensy 3.0 is discontinued for the 3.1, do I need to redesign for the new MK20 MCU so I can I keep buying the PJRC programmed Mini54?
    The Mini54 we're shipping now (and have been for several weeks) will automatically detect either chip and "just work".

    If you have old Mini54s, purchased before November, they'll probably only work with the '128 chip.

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    Sounds good. Is there any info about the audio library?

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    Senior Member+ MichaelMeissner's Avatar
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    Paul, is the IDE still going to define __MK20DX128__, or will the various libraries need to test __MK20DX256__ as well as __MK20DX128__. I would hope that both would be set for Teensy 3.1.

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    Senior Member+ MichaelMeissner's Avatar
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    Also, in looking at the table comparing Teensy 3.0 and 3.1 (http://www.pjrc.com/teensy/teensy31.html). It mentions the Teensy 3.0 had a 4 byte FIFO. I thought it was 8 byte.

    I assume since there is no mention of improved FIFOs for RX2/TX2 and RX3/TX3 that there is no change to the FIFO (1 byte if memory serves). Do the Can/I2S buses have builtin FIFO?

  15. #15
    Senior Member PaulStoffregen's Avatar
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    There are a total of 3 FIFO on Teensy 3.0 and 5 FIFOs on Teensy 3.1.

    Teensy 3.0 has an 8 byte FIFO on Serial1, a 4 word FIFO on SPI, and a 4 word FIFO on I2S.

    Teensy 3.1 has 8 byte FIFOs on Serial1 and Serial2, a 4 word FIFO on SPI, an 8 word FIFO on I2S, and a 6 message FIFO on CAN (which takes 6 of the mailboxes when configured in FIFO mode).


    is the IDE still going to define __MK20DX128__, or will the various libraries need to test __MK20DX256__ as well as __MK20DX128__
    Libraries will need to check both. Or they can check defined(__arm__) && defined(CORE_TEENSY), as several already do.

    I patched the libraries included with the Teensyduino installer to check both. I'll be submitting pull requests to others over the next couple days.

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    Quote Originally Posted by PaulStoffregen View Post
    The Mini54 we're shipping now (and have been for several weeks) will automatically detect either chip and "just work".

    If you have old Mini54s, purchased before November, they'll probably only work with the '128 chip.
    Perfect, thanks.

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    Senior Member+ MichaelMeissner's Avatar
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    As I was looking at side by side pictures, it looks hard to tell the two apart, other than remembering the Arm part number or seeing whether the contact are gold colored or tin colored. Hopefully in real life it will be easier for those of us who have multiple Teensy's already and may plan to buy new 3.1 boards in the future.

  18. #18
    Member Dawnmist's Avatar
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    The new Teensy 3.1 looks really interesting. Are the GPIO port mappings for port A/B/C/D/E the same as they were on the Teensy 3.0? (i.e. as per the tables in this thread: Tutorial on digital I/O, ATMega PIN/PORT/DDR D/B registers vs. ARM GPIO_PDIR / _PDOR). I'm assuming they are, but I figured I'd check...

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    Awesome work, Paul!

  20. #20
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    3.1.. great!
    More RAM!
    Two FIFO based UART channels.
    D/A - good thing.

  21. #21
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by Dawnmist View Post
    Are the GPIO port mappings for port A/B/C/D/E the same as they were on the Teensy 3.0?
    Yes. The only pin that changes is A14 where Reset used to be. All the others are mapped exactly the same, for compatibility with 3.0.

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    Well, this looks super sexy.

  23. #23
    Senior Member Constantin's Avatar
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    Pin 18!!???!!

    Quote Originally Posted by MuShoo View Post
    Well, this looks super sexy.
    agreed… at least in the context of a chip / MCU board. The Teensy is once again pulling ahead of the crowd.

    I presume the new DAC output is the elusive/exclusive pin 18? Just trying to get started here on a Teensy 3.1 Eagle libraries, both for the chip as well as the assembled part.

  24. #24
    Senior Member+ manitou's Avatar
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    Paul,
    is there a version with header pins?

  25. #25
    Senior Member+ MichaelMeissner's Avatar
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    Quote Originally Posted by manitou View Post
    Paul,
    is there a version with header pins?
    http://www.pjrc.com/store/teensy31_pins.html

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