// Chapter 44: Inter-Integrated Circuit (I2C)
#define I2C_C1_IICEN (uint8_t)0x80 // I2C Enable
#define I2C_C1_IICIE (uint8_t)0x40 // I2C Interrupt Enable
#define I2C_C1_MST (uint8_t)0x20 // Master Mode Select
#define I2C_C1_TX (uint8_t)0x10 // Transmit Mode Select
#define I2C_C1_TXAK (uint8_t)0x08 // Transmit Acknowledge Enable
#define I2C_C1_RSTA (uint8_t)0x04 // Repeat START
#define I2C_C1_WUEN (uint8_t)0x02 // Wakeup Enable
#define I2C_C1_DMAEN (uint8_t)0x01 // DMA Enable
#define I2C_S_TCF (uint8_t)0x80 // Transfer Complete Flag
#define I2C_S_IAAS (uint8_t)0x40 // Addressed As A Slave
#define I2C_S_BUSY (uint8_t)0x20 // Bus Busy
#define I2C_S_ARBL (uint8_t)0x10 // Arbitration Lost
#define I2C_S_RAM (uint8_t)0x08 // Range Address Match
#define I2C_S_SRW (uint8_t)0x04 // Slave Read/Write
#define I2C_S_IICIF (uint8_t)0x02 // Interrupt Flag
#define I2C_S_RXAK (uint8_t)0x01 // Receive Acknowledge
#define I2C_C2_GCAEN (uint8_t)0x80 // General Call Address Enable
#define I2C_C2_ADEXT (uint8_t)0x40 // Address Extension
#define I2C_C2_HDRS (uint8_t)0x20 // High Drive Select
#define I2C_C2_SBRC (uint8_t)0x10 // Slave Baud Rate Control
#define I2C_C2_RMEN (uint8_t)0x08 // Range Address Matching Enable
#define I2C_C2_AD(n) ((n) & 7) // Slave Address, upper 3 bits
#define I2C0_A1 *(volatile uint8_t *)0x40066000 // I2C0 Address Register 1
#define I2C0_F *(volatile uint8_t *)0x40066001 // I2C0 Frequency Divider register
#define I2C0_C1 *(volatile uint8_t *)0x40066002 // I2C0 Control Register 1
#define I2C0_S *(volatile uint8_t *)0x40066003 // I2C0 Status register
#define I2C0_D *(volatile uint8_t *)0x40066004 // I2C0 Data I/O register
#define I2C0_C2 *(volatile uint8_t *)0x40066005 // I2C0 Control Register 2
#define I2C0_FLT *(volatile uint8_t *)0x40066006 // I2C0 Programmable Input Glitch Filter register
#define I2C0_RA *(volatile uint8_t *)0x40066007 // I2C0 Range Address register
#define I2C0_SMB *(volatile uint8_t *)0x40066008 // I2C0 SMBus Control and Status register
#define I2C0_A2 *(volatile uint8_t *)0x40066009 // I2C0 Address Register 2
#define I2C0_SLTH *(volatile uint8_t *)0x4006600A // I2C0 SCL Low Timeout Register High
#define I2C0_SLTL *(volatile uint8_t *)0x4006600B // I2C0 SCL Low Timeout Register Low
#if defined(__MK20DX256__)
#define I2C1_A1 *(volatile uint8_t *)0x40067000 // I2C1 Address Register 1
#define I2C1_F *(volatile uint8_t *)0x40067001 // I2C1 Frequency Divider register
#define I2C1_C1 *(volatile uint8_t *)0x40067002 // I2C1 Control Register 1
#define I2C1_S *(volatile uint8_t *)0x40067003 // I2C1 Status register
#define I2C1_D *(volatile uint8_t *)0x40067004 // I2C1 Data I/O register
#define I2C1_C2 *(volatile uint8_t *)0x40067005 // I2C1 Control Register 2
#define I2C1_FLT *(volatile uint8_t *)0x40067006 // I2C1 Programmable Input Glitch Filter register
#define I2C1_RA *(volatile uint8_t *)0x40067007 // I2C1 Range Address register
#define I2C1_SMB *(volatile uint8_t *)0x40067008 // I2C1 SMBus Control and Status register
#define I2C1_A2 *(volatile uint8_t *)0x40067009 // I2C1 Address Register 2
#define I2C1_SLTH *(volatile uint8_t *)0x4006700A // I2C1 SCL Low Timeout Register High
#define I2C1_SLTL *(volatile uint8_t *)0x4006700B // I2C1 SCL Low Timeout Register Low
#endif