... for lack of a better term.

I've been playing around with the programmable delay block, coupled with DMA and the ADC to read 6 channels, switching out the ADC0_SC1A for each sample to enable converting different pins. I'd like to sample those 6 channels as fast as possible, considering them as one 'timestep'. Does anyone have some advice on how I would go about timing that timestep?

Basically, I want to run conversions on those 6 pins as fast as possible, with a set delay between timesteps (100uS). I can get the PDB running at that speed, but it would result in spacing out each conversion evenly throughout (one every ~16 uS). As far as I can understand it, there's one PDB for each ADC. I've been considering just sampling at a faster speed using the PDB and discarding that I don't need, but I'd like a more elegant solution.

I've written it with the standard analogRead, but I'm at a loss on how to do it at a lower level.

Would the flextimer be able to start the PDB for a one-shot 6 conversion cycle repeatedly?