DMA performance

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christoph

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I'm not sure how the read the datasheet (Teensy 3.1) with regard to DMA performance. In this thread, the goal is to have 16 M pin samples per second. I'm not sure if that can be achieved or not, with a Teensy 3.1 running at 96 MHz.

There's a formula given:
PEAKreq = freq / [ entry + (1 + read_ws) + (1 + write_ws) + exit ]
where
  • freq: System frequency (96 MHz)
  • entry: channel startup (4 cycles)
  • read_ws: read wait states (2 from peripheral)
  • write_ws: write wait states (zero to SRAM)
  • exit: channel shutdown (3 cycles)
The result is about PEAKreq = 8.7 M, yet table 21-292 indicates that the peak peripheral-to-SRAM transfer rate is 100 Mbytes/s (25 M transfers per second for 32 bit transfers)

Can anyone shed some light on this? How fast can DMA transfer pin samples to SRAM?

Regards

Christoph
 
It looks like the source of the confusion is the specific wording around those two numbers.

The 100MByte/s is called the "Peak transfer rate" which I take to mean the data rate while the DMA engine is within the minor loop (the max data rate for a single request).

The formula that you quote is for the "Peak request rate" which I understand to mean the maximum rate that you can request a DMA transfer (one minor loop). This rate includes the DMA channel setup time and a minor loop that's only a single transfer (shortest possible DMA transaction).

I think that the correct setup for the thread you link to would be to setup a single DMA transfer with a large minor loop count so that all the samples are taken at the peak transfer rate.
 
Oh that makes sense! So by using a large minor loop count it's possible to have close-to-insane speed, but throttling it down to 16 M requests per second is not possible. Only if the requeired requests per second are low enough to include the major loop latency we can throttle the transfer speed to something lower than 8.7 M per second. Am I close enough?
 
I think you're right. I think the minor loops run as fast as possible, so there's no way to setup a transfer speed between the absolute peak (all points in the minor loop) and the fastest possible DMA request rate (single transfer in each minor loop).
 
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