Canceling DMA mid-stream?

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nox771

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Does anyone know the procedure for canceling DMA transfers mid-stream?

Inside the DMA_CR register there are CX and ECX bits, but it is not at all clear how to use them. There is no method I can discern for telling the DMA controller what channel to cancel. The bit descriptions say they cancel the "executing" channel, but then right above it, it says writes to CR can only be performed when the channel is inactive. Who came up with this!?

Searches turn up nothing, I can't find any descriptions, code, or appnotes on how to use these cancel bits. Any ideas?
 
The mk20dx256, that is? I'd say that "proper operation" in the note above the description of DMA_CR refers to the use cases where cancelling is not needed. For a quick test I'd configure a DMA channel for a memcopy operation (say 1 kB), start it, and cancel it. Check result and DMA error registers. Especially the ECX bit description is somewhat contradictory to the "proper operation" note: it treats cancelling as an error condition.

I think the people who were in charge of writing the datasheet just couldn't come up with anything better, really.
 
I just don't get how to specify which channel to cancel. If you have multiple DMA going (octo, SPI, ADC, I2C, whatever), I don't get how one would specify which to cancel (there is no provision for it I can see). Not at all clear to me.

I thought about trying to inject an early termination into the TCD structure (make it think it's done), but that's probably a bad idea on a running DMA.
 
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