Dipsy - a tiny FPGA board

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christoph

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I joined antti at hackaday.io who was developing a tiny breadboard-friendly FPGA board: DIPSY. It has a DIP-8 pinout, plus 6 extra pins which can be accessed from above. See it here together with a Teensy 3.1:
DSC_0351.jpg
The FPGA has 1284 logic cells and 7 KB RAM, which is enough to create some great peripherals. A simple AVR-ish core eats up about 30 % of the resouces. Also included:
  • 2 I2C interfcaes
  • 48 MHz oscillator
  • 10 kHz oscillator
  • IR TX/RX
  • 3x 24 mA, 1x 100 mA, 1x 400 mA LED driver
  • up to 10 I/O lines, 5 of those are open drain only
There's an on-board 1.2V regulator for the core, so you really just add it to your breadboard and that's it.

I didn't have any prior FPGA experience but this thing lowered the entry barrier enough for me to give it try. I managed to implement various blinkys, an SPI slave and a WS2812B driver:


There's an arduino library that configures dipsy over SPI, with a configuration stored in a plain C array. No further programming hardware required. The final design is planned to include a configuration flash chip as well.

Regards

Christoph
 
That's brilliant.
What are the plans for this? Open sourcing? Selling it?

Which FPGA does it use?
 
That is a very small chip, I didn't realize FPGAs were available in such sizes! Amazing you could solder that package yourself.
 
Is there any version of this chip that supports a faster clock? For example the Spartan-6 FPGAs I have used can handle signals above 300 MHz. That was the main reason to use a FPGA for me, to work with faster signals than the CPU could handle. Otherwise, I found a CPU is easier to program.
 
Don't know about other vendors, but Xilinx tools all support Linux and Windows. Most of the developers at Xilinx prefer Linux. At work I run Vivado and ISE on Windows 7 and RHEL. At home I run Vivado on Centos. Xilinx does not run on Mac OS, but you can run the tools in a VM on Apple hardware. Spartan 6 is only supported by the older ISE software. Zynq, Artix and the other new device families are all supported by Vivado.
 
Tools: Lattice's iCECube2 software is used to compile code into a binary. I have it running on both Windows (8.1) and Linux (ubuntu 14.04) without problems. For simulation I use Xilinx's Vivado, but for some reason I could only install the license once on windows. I don't know if this is a platform issue or a license issue.

Speed: There is a larger version of this chip (36 pins) that has a PLL which outputs up to 275 MHz, and the global buffer clock network (also for this smaller chip) is limited to 185 MHz. I'm not sure if these are the relevant numbers, though.
 
Thank you very much for posting this!
Most of the FPGa solutions I've come across are solving problems on a much higher level than I need. I never knew that such small and inexpensive FPGA's are available.
 
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