Generate (n*8) MHz clock signal on Teensy 3.1

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Ben

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Hello everyone,

I'd like to have my Teensy 3.1 generate a clock signal that is derived from the teensy on-board oscillator. My peripherals can cope with 8, 16, 24 or 32 MHz clock speed, so I don't care which of these frequencies to generate, any one is fine.
So far I found these options to accomplish this task:

- use IntervalTimer
- use the FrequencyTimer2 library
- use a PWM output and change it's frequency to 8MHz or multiples (not sure if PWM can go much above 8MHz) with 50% duty cycle.
- use tone(), maybe?

Which of these solutions gives me the pest performance? I don't care much about jitter of a few microseconds, but over a longer period of some milliseconds and more the output frequency should be locked to the teensy's onboard oscillator and internal clocking network, even when there are multiple ISR calls per millisecond.
Which solution can accurately produce the required frequency and needs no change in the source code when changing cpu speed? Are there CPU speeds at which an exact 8MHz output can not be achieved (or 16MHz, or 24...) due to PLL restrictions?

With best regards

Ben
 
Have a look at some of the work that TelephoneBill has done creating a very accurate clock / signal source. You should be able to create a 8MHz signal with the PWM, no problem, other than the temperature-related vagaries of the CPU XO.
 
- use a PWM output and change it's frequency to 8MHz or multiples (not sure if PWM can go much above 8MHz) with 50% duty cycle.

Use this with analogWriteFrequency().

When Teensy runs at 96 or 48 MHz, the timer clock is 48 MHz, so you can get 8 or 24 MHz 50% duty cycle.
 
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