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Thread: UTFT - Teensy 3.2 Port Numbers?

  1. #1
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    UTFT - Teensy 3.2 Port Numbers?

    From attempting an older port from Dawn Mist I found an newer update, as found here:

    http://www.rinkydinkelectronics.com/library.php?id=52

    It seems to compile fine, but, I've noticed that the pin config needs to be in a certain order.

    In file 'HW_MX20DX256.h' (which I assume is the Teensy 3.2 definition) the ports read as follows:


    void UTFT::_set_direction_registers(byte mode)
    {
    GPIOD_PDDR |= 0xFF;
    PORTD_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR4 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR5 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR6 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR7 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);

    if (mode == 16)
    {
    GPIOB_PDDR |= 0x000F000F;
    PORTB_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR16 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR17 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR18 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    }
    }


    I can't seem to find a port & pinout diagram anywhere despite extensive reading and searching.

    The version that Dawn Mist had released seemed simpler as I could have changed the pin defs in the file 'HW_Teensy3.h'.

    I wish to change to the following config:

    PIN 0 - PIN 10 / DB0 - DB10
    PIN 14 - PIN 18 / DB11 - DB15


    I am asking as I would like to be able to change this again in the future in case I need to change the pinout again.

    Where can I find the port numbers & pinout information?

    Will this setup automatically run in 16bit parallel, or do I need to declare this in my sketch somewhere?

    I have other questions on this, but I will save them for another time as these are the most pressing at the moment.

    Thanks in advance!

  2. #2
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by teensy_noob View Post
    I can't seem to find a port & pinout diagram anywhere despite extensive reading and searching.
    Check out the schematic. It shows the pin numbers on the right hand side, and the wires connect to the native port names on the chip.

    http://www.pjrc.com/teensy/schematic.html

  3. #3
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    Quote Originally Posted by PaulStoffregen View Post
    Check out the schematic. It shows the pin numbers on the right hand side, and the wires connect to the native port names on the chip.

    http://www.pjrc.com/teensy/schematic.html
    Ahha!

    I had completely forgotten about this!


    However, looking over the code in HW_MX20DX256.h, I'm getting a bit lost with the assignments.


    For example:

    UTFT - Teensy 3.2 - Port number in file - Port number on Teensy schematic

    DB0 - D16 - PORTD_PCR0 - PTB0 (Would this mean that it would be portB not portD? Wouldn't this be pin2 not pin16?)
    DB1 - D17 - PORTD_PCR1 - PTB1

    DB10 - D7 - PORTB_PCR1 - PTD2
    DB13 - D20 - PORTB_PCR16 - PTD5


    What am I missing here?

    Am I in the wrong file looking at the wrong piece of code?

    How to I change this so that I can correctly assign the pins?
    Last edited by teensy_noob; 03-01-2016 at 01:33 AM.

  4. #4
    Senior Member PaulStoffregen's Avatar
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    TFT displays with only 8 bits use their DB8 to DB15 pins. Their DB0 to DB7 pins are unused in 8 bit mode, which seems counterintuitive, but that's the way these display work.

    Sadly, it seems this fact isn't well documented anywhere now. But it used to be in the older version of UTFT (which is the version Teensyduino still installs).

    Code:
     * For LCDs with 8 bit data busses:
     * Use the pin defines for DB_8 to DB_15 to connect to your LCD. This puts them
     * on Port D in both the USE_C_D_PORTS and USE_B_D_PORTS settings, making those
     * two settings equivalent (and a single write to set the pins on the bus).
    Also, you should be aware the choice between 8 and 16 bits is made by connections to pins on the LCD controller chip, which generally you can't access and can't (usually) change.

  5. #5
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    Quote Originally Posted by PaulStoffregen View Post
    TFT displays with only 8 bits use their DB8 to DB15 pins. Their DB0 to DB7 pins are unused in 8 bit mode, which seems counterintuitive, but that's the way these display work.

    Sadly, it seems this fact isn't well documented anywhere now. But it used to be in the older version of UTFT (which is the version Teensyduino still installs).

    Code:
     * For LCDs with 8 bit data busses:
     * Use the pin defines for DB_8 to DB_15 to connect to your LCD. This puts them
     * on Port D in both the USE_C_D_PORTS and USE_B_D_PORTS settings, making those
     * two settings equivalent (and a single write to set the pins on the bus).
    Also, you should be aware the choice between 8 and 16 bits is made by connections to pins on the LCD controller chip, which generally you can't access and can't (usually) change.

    I'm using an SSD1289.
    I believe this is 16bit?

    I understand I can't change the pinout on the TFT, but, I'm looking to change the pinout on the Teesny, not the TFT.

    How do I change the pinout on the Teensy3.2 itself, so that I can create different pin arrangements?


    Using:

    http://www.rinkydinkelectronics.com/...quirements.pdf

    Eg. How do I change TFT DB0 so it runs from Teensy pin0 rather than Teesny pin16?


    I am still not sure how the ports in HW_MX20DX256.h relate to the Teensy port numbers.

    Why is PORTD_PCR0 == PTB0?
    Am I wrong in saying PTB0 is Teensy pin16?

    Why is it written as PORTD_PCR0?
    I assumed that would mean Teesny pin2. Or am I completely missing it here?


    Thanks for the feedback so far!
    Last edited by teensy_noob; 03-02-2016 at 12:22 AM.

  6. #6
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by teensy_noob View Post
    Why is PORTD_PCR0 == PTB0?
    It's not. PORTD_PCR0 is PTD0. You've mixed up which things are what. Easy mistake to make when cross comparing lots of complicated stuff.

  7. #7
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    Quote Originally Posted by PaulStoffregen View Post
    It's not. PORTD_PCR0 is PTD0. You've mixed up which things are what. Easy mistake to make when cross comparing lots of complicated stuff.

    Ah! OK, I think I can see that now.

    This is the way I am reading it now:

    Code:
    void UTFT::_set_direction_registers(byte mode)
    {
    	GPIOD_PDDR |= 0xFF;									//	TFT Pin	//	Teensy3.X Pin
    	PORTD_PCR0  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB8		//	D2
    	PORTD_PCR1  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB9		//	D14
    	PORTD_PCR2  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB10		//	D7
    	PORTD_PCR3  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB11		//	D8
    	PORTD_PCR4  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB12		//	D6
    	PORTD_PCR5  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB13		//	D20
    	PORTD_PCR6  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB14		//	D21
    	PORTD_PCR7  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);		//	DB15		//	D5
    
    	if (mode == 16)
        {
    		GPIOB_PDDR |= 0x000F000F;
    		PORTB_PCR0  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB0		//	D16
    		PORTB_PCR1  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB1		//	D17
    		PORTB_PCR2  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB2		//	D19
    		PORTB_PCR3  = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB3		//	D18
    		PORTB_PCR16 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB4		//	D0
    		PORTB_PCR17 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB5		//	D1
    		PORTB_PCR18 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB6		//	D32
    		PORTB_PCR19 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);	//	DB7		//	D25
        }
    }
    Would this mean that, if I wished to change from portB to portC I would write:


    Code:
    GPIOC_PDDR |= 0x000F000F;
    PORTC_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTC_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    .....etc

    If I wished to split between portA + portB + portC + portD, with four ports per group, could I write something like this(?):

    Code:
    void UTFT::_set_direction_registers(byte mode)
    {
    GPIOA_PDDR |= 0x**;
    PORTA_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTA_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTA_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTA_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    
    GPIOB_PDDR |= 0x**;
    PORTB_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTB_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    
    if (mode == 16)
    {
    GPIOC_PDDR |= 0x**;
    PORTC_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTC_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTC_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTC_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    
    GPIOD_PDDR |= 0x**;
    PORTD_PCR0 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR1 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR2 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    PORTD_PCR3 = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
    }
    }
    **I have no idea of what value to put in here. What does this value do? Is this to do with pulling pins high / low, or for something else? Multiplexing perhaps?

    Apologies for so many questions, I am a little out of my depth here to say the least, but trying my hardest to get my head around as much as I can!
    Last edited by teensy_noob; 03-02-2016 at 03:36 AM.

  8. #8
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    I found this (for anyone on the same quest):

    xxx.stm32f0-gpio-tutorial-part-1.html

    { Updated stale link }
    Last edited by defragster; 08-22-2019 at 08:21 PM. Reason: Updated stale link

  9. #9
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    Quote Originally Posted by teensy_noob View Post
    I found this (for anyone on the same quest):

    http://hertaville.com/stm32f0-gpio-tutorial-part-1.html
    Interested in this. But that link now goes to "Sex Snap Hookup".
    Here is a capture of the original from the Wayback Machine: https://web.archive.org/web/20190317071524/http://hertaville.com/stm32f0-gpio-tutorial-part-1.html
    Last edited by defragster; 08-22-2019 at 08:22 PM. Reason: Updated stale link

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