K66 Beta Test

defragster · Jul 5, 2016

Yes. Always the same x3c ID , I have two of them. If you give me tips I can set up a teensy slave quickly

PaulStoffregen · Jul 5, 2016

@nox771 - I have an extra SSD1306 display and some FRAM chips rated for 1 MHz I2C. Would any of these help? We could send them tomorrow.

defragster · Jul 5, 2016

@nox771 - I made it home. Restored to the prior posted unedited i2c_t3 files.

>> were there Kinetis.h changes?

T_3.1 running SLAVE @44 :: Moved to 0x38 - it was hanging on scan at 0x3e?

Reverted to scanner and put p11/p12 to gnd. Added while(!Serial). It never blinks the LED. With target range 0x38-0x3c, now it hangs on 0x39?

Connected 18/19 to 18/19 - do the lines Cross like Serial wire straight?

Can you post a SLAVE and SCANNER that you have tested to work? Ideally with the Scanner adjustable across the Wire#'s.

KurtE · Jul 5, 2016

Hi again - FYI on my machine I recently did a sync back up to Paul's github (core) and some other places plus I copied nox771's i2c_t3 library files...

I reran the BNO055 test, this time had Logic Analyzer set up and looking at pins 3, 4 (I am using Wire2), plus hooked up leads to 19, 18, 17, 16, 37, 38, and I started the logic analyzer capture just before the program was downloaded.

The LA output is showing at the first output over SPI. I am not seeing any other stuff on the other IO pins.

Note: I am not having much luck with the older Daventech sensors, may play more with them later. So far I have found a few of my level shifters (TXB0108 and 0104, Adafruit BSS138 FET and a sparkfun PCA9306 based translater, that they say is for I2C...).

Also would it help to setup one or more T3.2s with maybe the client demo program?

defragster · Jul 5, 2016

KurtE said:
... Also would it help to setup one or more T3.2s with maybe the client demo program?

Client Demo -do you mean i2C Slave sketch?

I was going to ask if there is call for a 1.29b4 to make sure we're on the same page? I could sync to Core if that is the right thing.

KurtE · Jul 5, 2016

Yes i2c slave...

Not sure if sync is 100% required, but it picked up all of of the changes including mine that Paul merged in. So I wanted a version who had all of the header file updates. Plus hopefully not running into issues that were already fixed.

Wish there was a place to also get all of the changes made to the different libraries...

nox771 · Jul 5, 2016

defragster said:
Can you post a SLAVE and SCANNER that you have tested to work? Ideally with the Scanner adjustable across the Wire#'s.

Ok, I've tested this as follows. I wrote a Master sketch that will sweep all 4 buses. I used a common Slave sketch to program an LC, T3.0, and T3.1 as slaves. The hookup is like this:

T3.5 @ 96MHz F_CPU (Master)
-->Wire(18/19)-->LC(Slave)
-->Wire1(37/38)-->T3.0(Slave)
-->Wire2(3/4)-->T3.1(Slave)
-->Wire4(42/43)--> no connection

When I run the verbose trigger on this (pin11 low), I get the following output:

Code:

---------------------------------------------------
Bus Status Summary
---------------------------------------------------
Wire  Config: MASTER,18/19,I2C_PULLUP_EXT,Rate:400000Hz
Wire1 Config: MASTER,37/38,I2C_PULLUP_EXT,Rate:400000Hz
Wire2 Config: MASTER,3/4,I2C_PULLUP_EXT,Rate:400000Hz
Wire3 Config: MASTER,42/43,I2C_PULLUP_EXT,Rate:400000Hz
---------------------------------------------------
Starting scan: Wire
Config: MASTER,18/19,I2C_PULLUP_EXT,Rate:400000Hz
---------------------------------------------------
Addr 0x30
Addr 0x31
Addr 0x32
Addr 0x33
Addr 0x34
Addr 0x35
Addr 0x36
Addr 0x37
Addr 0x38
Addr 0x39
Addr 0x3A
Addr 0x3B
Addr 0x3C ACK
Addr 0x3D
Addr 0x3E
Addr 0x3F
---------------------------------------------------
Starting scan: Wire1
Config: MASTER,37/38,I2C_PULLUP_EXT,Rate:400000Hz
---------------------------------------------------
Addr 0x30
Addr 0x31
Addr 0x32
Addr 0x33
Addr 0x34
Addr 0x35
Addr 0x36
Addr 0x37
Addr 0x38
Addr 0x39
Addr 0x3A
Addr 0x3B
Addr 0x3C ACK
Addr 0x3D
Addr 0x3E
Addr 0x3F
---------------------------------------------------
Starting scan: Wire2
Config: MASTER,3/4,I2C_PULLUP_EXT,Rate:400000Hz
---------------------------------------------------
Addr 0x30
Addr 0x31
Addr 0x32
Addr 0x33
Addr 0x34
Addr 0x35
Addr 0x36
Addr 0x37
Addr 0x38
Addr 0x39
Addr 0x3A
Addr 0x3B
Addr 0x3C ACK
Addr 0x3D
Addr 0x3E
Addr 0x3F
---------------------------------------------------
Starting scan: Wire3
Config: MASTER,42/43,I2C_PULLUP_EXT,Rate:400000Hz
---------------------------------------------------
Addr 0x30 Timeout
Addr 0x31 Timeout
Addr 0x32 Timeout
Addr 0x33 Timeout
Addr 0x34 Timeout
Addr 0x35 Timeout
Addr 0x36 Timeout
Addr 0x37 Timeout
Addr 0x38 Timeout
Addr 0x39 Timeout
Addr 0x3A Timeout
Addr 0x3B Timeout
Addr 0x3C Timeout
Addr 0x3D Timeout
Addr 0x3E Timeout
Addr 0x3F Timeout

This is correct given the hookup. When I put the analyzer on it, there is no crosstalk:

I'm really not seeing a problem here. There must be some sort of code error or hookup error somewhere.

I've attached my sketches. Try them out and let me know. The buses should timeout if left open. Maybe try just one Slave device and see if it scans, then migrate it across the buses.

edit: forgot to mention, was using 2k external pullups

defragster · Jul 5, 2016

EDIT:
Updated Core from GitHub! Using Prior post i2c_t3 update code and test_bus & test_slave.
Need to put pullups on Teensy as Slave device! I moved 'slave' to 0x3d and then put on my 0x3c display with pullups.
Wire_ I2C0 - both ACK
Wire1 I2C1 - both ACK
Wire2 I2C2 - both ACK

Starting scan: Wire1
Config: MASTER,37/38,I2C_PULLUP_EXT,Rate:400000Hz
---------------------------------------------------
Addr 0x3C ACK
Addr 0x3D ACK

Moved Back to AdaFruit and 0x3C display
Wire1 :: WORKED 96 and 240 MHz
Wire2 :: WORKED 180 MHz, and bus test sees it as ACK when that sketch reloaded (at 48 and 180 MHz )

<EDIT>: Because the example ssd1306_128x64_i2c.ino declared pin 4 for RESET during init
NOW sure why my Adafruit sketch with "#define Wire Wire1" works, but "#define Wire Wire2" does not?

I must now have a bad display - there is a CAP that gets burning hot that was heating the whole OLED.

nox771 · Jul 5, 2016

PaulStoffregen said:
@nox771 - I have an extra SSD1306 display and some FRAM chips rated for 1 MHz I2C. Would any of these help? We could send them tomorrow.

Thanks, but really it's unnecessary (unless you want me to specifically analyze those parts). Although for as much as I work on this lib I really have almost no common I2C slave parts (I always use Teensy devices as my slaves). Everything I've tested shows the lib is working, and I'm hoping defragster's issue is just a subtle bug in the sketch or HW.

There are a few tweaks I still plan on doing. One thing that I know isn't working yet is arbitration, it's actually not right for any device type, but I do have some thoughts on how to fix it (arb lost is a strange thing, you start off sending data and end up with a receive packet...). But I'll probably push a new update to GitHub before I try to fix arb.

One thing that didn't cause any problem at all was DMA. All the work that went into the DMA library really paid off on that, very nice.

defragster · Jul 6, 2016

FINALLY figured it out! Wire2 Working on AdaFruit Example! The sketch was specifying reset pin at #4! That of course conflicts with Wire2! Changed init to :: Adafruit_SSD1306 display(-1);

There is no wired reset so this sketch should be changed:: hardware\teensy\avr\libraries\Adafruit_SSD1306\examples\ssd1306_128x64_i2c\ssd1306_128x64_i2c.ino

See this post for earlier success.

Edit: Created Pull request to drop p4 usage and init with display(-1)

Edit2: BTW - with KurtE's change for "SIM_SCGC1 |= SIM_SCGC1_I2C2;" and now taking off the reset pin - my edited version of i2c_t3 WORKS for the AdaFruit on Wire2!

KurtE · Jul 6, 2016

Glad you got it going! I may still try out a few more things here, for the fun of it.

Frank B · Jul 6, 2016

Hm..same effect again with writing a new file:

Code:

<dir>  �C�#B.d�    <dir>  �C�#C�.d�
    <dir>  �C%��#.Dd�
    <dir>  C##CS".d�
    <dir>  %C##C#.Dd�
      320  UDU5C.$�
 4294967055  @��.��
    <dir>  �D��.�
    <dir>  �t��5U".�
       96  3cB.
      192  d�4�.
      192  �4U$d�4.�
 4279173120  0P.`�
      192  �4U$d��.
 4294967055  0P.`�
      192  �4U$d��."

The existing filenames are destroyed.

Theremingenieur · Jul 6, 2016

Frank B said:

Hm..same effect again with writing a new file:

Code:

<dir>  �C�#B.d�    <dir>  �C�#C�.d�
    <dir>  �C%��#.Dd�
    <dir>  C##CS".d�
    <dir>  %C##C#.Dd�
      320  UDU5C.$�
 4294967055  @��.��
    <dir>  �D��.�
    <dir>  �t��5U".�
       96  3cB.
      192  d�4�.
      192  �4U$d�4.�
 4279173120  0P.`�
      192  �4U$d��.
 4294967055  0P.`�
      192  �4U$d��."

The existing filenames are destroyed.

Could that be an encoding problem? I see these phenomenons often when reworking old French ISO-Latin based code in modern UTF-8 environments... The French language is really f...cked up with things like éèàùçô and so on...

Frank B · Jul 6, 2016

Hm, these files and filenames were ok (written with PC) - i wrote a new file, and this lead to the listing above - the fat got destroyed somehow..

edit: a pure ascii filename.

KurtE · Jul 6, 2016

Sorry, I am probably slightly off topic, but once/if I get the SRF08 working on T3.2 will try on 3.5... But my I2C speak is real rusty.
Made a little progress, with the sensor. Trying out the library: https://github.com/LeoColomb/Arduino-SRF/

The Wire library hangs out to dry. I am pretty sure timing related... I added a delay in one place and it was able to get version number from it. But hangs when it tries to issue ping...

Output from LA:

The code does a request to SRF08: E0(device id), 0 (register), 51 (cent), 9, 8c - Had ACK on each byte until last byte:

It then tries to do a read from E0,
So writes E0 - Gets a NAK

Then does a read E1 - Gets a NAK

Then code hangs in loop waiting for return of available() of the number of bytes requested, which will never happen. So my guess is I need to change to detect the NAK and probably delay and try again?

Currently using Wire, may try with I2C_t3...

Frank B · Jul 6, 2016

Frank B said:
Hm, these files and filenames were ok (written with PC) - i wrote a new file, and this lead to the listing above - the fat got destroyed somehow..

edit: a pure ascii filename.

...tried some things: seems to be a timing-problem @ 240MHz (perhaps other F_CPU (or f_bus ? which is the clock ?) , too)

PaulStoffregen · Jul 6, 2016

I'm posted another beta installer which rolls up K66 beta test changes.

https://forum.pjrc.com/threads/35315-Teensyduino-1-29-Beta-4-Available

As before, you'll need to use this boards.txt file after installing.

defragster · Jul 6, 2016

Downloaded and installed 1.29b4 and Boards.txt replaced re p#642.

i2c_t3 not updated so using local copy, simple #define edits to Adafruit_SSD1306 as before - per comment #2 here Adafruit_SSD1306/pull

It compiled and is running on Wire2 as before.

Have tried the Speed at most spots 24-240MHz with SSD1306 - the i2c_t3 code working right, including the one higher speed with non-60MHz bus that generated a compile fail on older library.

Frank B · Jul 6, 2016

@wmxz: perhaps this (https://github.com/WMXZ-EU/uSDFS/pull/2/commits/967b70b4ec3933360fbb5d8a2fac5e6ae19feed0) is part of the problem.

WMXZ · Jul 6, 2016

Frank B said:

Hm..same effect again with writing a new file:

Code:

<dir>  �C�#B.d�    <dir>  �C�#C�.d�
    <dir>  �C%��#.Dd�
    <dir>  C##CS".d�
    <dir>  %C##C#.Dd�
      320  UDU5C.$�
 4294967055  @��.��
    <dir>  �D��.�
    <dir>  �t��5U".�
       96  3cB.
      192  d�4�.
      192  �4U$d�4.�
 4279173120  0P.`�
      192  �4U$d��.
 4294967055  0P.`�
      192  �4U$d��."

The existing filenames are destroyed.

Frank,
if you take it back to a PC are the files corrupt?
Do you have HXD.exe to look into the disk?
I would then open HXD as admin
under Extras->open disk the logical disk: the device:
the search ->find : filename wihout '.' or SYSTEM that would you bring to disk directory (should be sector 16384)
if the files are corrupt there, maybe the hex values give you a hint.
Also note, the original ELM CHanN FS is configured for Japanese. Also I have not tried LFN which needs Unicode routines, IIRC.

WMXZ · Jul 6, 2016

Frank B said:
@wmxz: perhaps this (https://github.com/WMXZ-EU/uSDFS/pull/2/commits/967b70b4ec3933360fbb5d8a2fac5e6ae19feed0) is part of the problem.

could be, but I remember that programmatically determine the scalers is a bit tricky,and a prescaler of 0 IS allowed indicating bypassing the prescaler (is on bottom of page 2025)
At least that was my interpretation and intention in coding.

Frank B · Jul 6, 2016

- The newly generated file is ok, but the FAT is corrupt
- No, (of course) i tested with LFN disabled.
- Plain ASCII-Characters for filenames (just changed "HALLO10.TXT" to "HALLO4.TXT")
- Yes, PC shows corrupted FAT too (want a sreenshot ?

- HXD: There is some file-data in Sector 16384, but no FAT. (btw, it's FAT32)

You're right with saying 0 is possible:

SDCLK Frequency Select
Used to select the frequency of the SDCLK pin. The frequency is not programmed directly. Rather this
register holds the prescaler (this register) and divisor (next register) of the base clock frequency register.
Setting 00h bypasses the frequency prescaler of the SD Clock. Multiple bits must not be set, or the
behavior of this prescaler is undefined. The two default divider values can be calculated by the frequency
of SDHC clock and the following divisor bits.

But later:

The frequency of SDCLK is set by the following formula: Clock frequency = (Base clock) / (prescaler x
divisor)
For example, if the base clock frequency is 96 MHz, and the target frequency is 25 MHz, then choosing
the prescaler value of 01h and divisor value of 1h will yield 24 MHz, which is the nearest frequency less
than or equal to the target. Similarly, to approach a clock value of 400 kHz, the prescaler value of 08h and
divisor value of eh yields the exact clock value of 400 kHz. The reset value of this field is 80h, so if the
input base clock ( SDHC clock ) is about 96 MHz, the default SD clock after reset is 375 kHz.
According to the SD Physical Specification Version 1.1 and the SDIO Card Specification Version 1.2, the
maximum SD clock frequency is 50 MHz and shall never exceed this limit.
Only the following settings are allowed:
01h Base clock divided by 2.
02h Base clock divided by 4.
04h Base clock divided by 8.
08h Base clock divided by 16.
10h Base clock divided by 32.
20h Base clock divided by 64.
40h Base clock divided by 128.
80h Base clock divided by 256.

- The example says: 1 as prescaler-value - your code gives a "0" -- with my patch your code generates 1,1 as values which matches the example.
- 0 is not mentioned in the table.

but ok, setting this did not really help... maybe you're right..maybe not

Maybe important : There are many many files on this card: 258 files in 10 folders, (92 Files in the "root" directory).

Frank B · Jul 6, 2016

Code:

48 45 4C 4C 4F 34 20 20 54 58 54 20 00 00 D8 A6 E6 48 E6 48 00 00 D8 A6 E6 48 6A 67 4A 00 00 00 03 13 03 65 F4 44 A7 E3 14 D5 03 32 00 06 97 2A 5E 64 8E 64 80 00 08 16 50 94 59 B6 69 09 D6 60 04 84 54 C4 C4 F3 42 02 05 45 85 42 00 00 08 9A 5E 64 80 00 00 00 08 9A 5E 64 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

Translated:

Code:

HELLO4  TXT ..Ø¦æHæH..Ø¦æHjgJ......eôD§ã.Õ.2..—*^dŽd€...P”Y¶i.Ö`.„TÄÄóB..E…B...š^d€....š^d€.....

Sector 8210

(FAT starts in sector 8192 on this card)
There are TWO zero-bytes after the Filename. Is that ok ? (Is it because it is the last added File?)

Frank B · Jul 6, 2016

..After several more tests:
It works good <144 MHZ.
With 144 MHZ i get a corupted FAT.
This time, i just reformatted the card and copied nothing to it.
The card was empty.
Sketch:

Code:

Create a new file (hello10.txt). Write a text data. (Hello world!)

 Close the file.

 Open same file (hello10.txt).
 
Failed with rc=4.

PC Says: Card is not accesible.

Edit: Screenshot:

- This time, the filename of the new file is missing, too..

WMXZ · Jul 6, 2016

Frank B said:
..After several more tests:
It works good <144 MHZ.
With 144 MHZ i get a corupted FAT.
This time, i just reformatted the card and copied nothing to it.
The card was empty.

without a SDHC device I have first to port to T3.2 before I can reuse Chan's Fat file system.
That needs some time, also in order to be compatible to standard Teensy software, I should use Paul's approach and not my derivation (spi,dma etc)
So that needs some time.

edit: I have a FRDM K64F, maybe I can try with that, but this would not be directly T3.5 compatible

K66 Beta Test

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