Teensy LC ADC input protection - which input impedance is acceptable?

[Ben]

I'd like to use the Teensy LC to sample an analog voltage coming from an OpAmp that's powered from a 5V rail. The signal is conditioned to be in the 0 to 3.3V range, so there's no problem. But since the OpAmp is powered from 5V it could potentially feed up to 5V into the Teensy LC in case of an error.

I'd like to use a Schottky diode to protect the Teensy LC, like this:


How large a value can the resistor be without affecting the ADC? Do I need a buffer cap like in the picture? How large? I can cope with a bit of low pass behavior, but "the faster the better"...

Another, related, question: The current will flow into the 3.3V rail. How much does the Teensy LC consume (with no sleep modes active)? I need to limit the current to below that value because the 3.3V regulator cannot sink current, only source.

Ben

 

[grease_lighting]

In my projects I use this scheme too. I typically use a 470 to 510 ohm resistor for R1 to limit the clamped output current to about 3mA. I do not use C1. For my clamp voltage I typically use a higher power op amp such as an L272 to provide source/sink capability. CAUTION: Use 2K or so feedback resistor from the output to the input as the 272 can be a bit unstable

 

[Ben]

Thanks for your reply. Using a high current Op is a neat trick I didn't think of before.

I dug into the KL26 Datasheet and there are some hints:
https://www.pjrc.com/teensy/KL26P64M48SF5.pdf Page 27:

To achieve the best results, the analog source resistance must be kept as low as
possible. The results in this data sheet were derived from a system that had < 8 Ω analog source resistance. The
RAS/CAS time constant should be kept to < 1 ns.

So with the Schottky diode having about 10pF of capacity, R*10pF < 1ns means R<100 Ohms. That's a bit on the low side, more than 10mA of current in case of an error

So given that I won't hold the time constant below 1ns and use a resistor in the 470 Ohms range, would it then be better so actually increase the capacitance (to lower the AC input impedance) for more accurate ADC operation? I'll use the ADC in heavy (32x) averaging mode, so although the sample rate will be in the low kHz range there will be quite a few ADC operations per second. I think I could get away with adding 1nF, that would set the cutoff frequency at 150kHz. Any thoughts on that?

Ben

 

[Theremingenieur]

A perhaps simpler approach would be to let the opamp's output go from 0 to 5V and then use a simple voltage divider (1.6k / 3.3k). Since even in case of a defective opamp, its output won't go beyond 5V, the output voltage of the divider won't go beyond 3.3V and thus, the Teensy's ADC input will be safe. The source impedance of the divider is IMHO low enough to not cause any trouble.

 

[Ben]

A perhaps simpler approach would be to let the opamp's output go from 0 to 5V and then use a simple voltage divider (1.6k / 3.3k). Since even in case of a defective opamp, its output won't go beyond 5V, the output voltage of the divider won't go beyond 3.3V and thus, the Teensy's ADC input will be safe. The source impedance of the divider is IMHO low enough to not cause any trouble.

You are right, I got lost in the details there instead of looking at the larger picture. Thanks