Hi,
I'm very interested to use the audio adapter (SGTL5000) in a servo control project. Having read the datasheet from cover to cover, I am still having to make a very important assumption about the CODEC's performance. I would be grateful if you could share any experience you have with it.
I need to know the group delay associated with the CODEC. The block diagrams of the sub-systems does not show any anti-alias filtering or decimation filtering, and there is no mention of associated group delays in the specifications. Can I therefore assume that the CODEC contains no such filtering?
To be specific I wish to know how long does it take to get a sample into the CODEC over I2S and for the corresponding analog conversion to be seen on the line-out. I can calculate i2s FIFO times within the MCU so this is not to be a consideration. I need to know does the unit have any internal FIFO, if so how many samples, (is it fixed), is there any digital decimation-filtering, if so what is the group delay.
For my closed loop system, group delay is utterly critical. Ideally I would like to see samples (let us say @96K) leave the MCU and that 10uS later the analog line-out reflects this sample.
Do you have any info and/or experience in this regard?
Many thanks
Aidan
I'm very interested to use the audio adapter (SGTL5000) in a servo control project. Having read the datasheet from cover to cover, I am still having to make a very important assumption about the CODEC's performance. I would be grateful if you could share any experience you have with it.
I need to know the group delay associated with the CODEC. The block diagrams of the sub-systems does not show any anti-alias filtering or decimation filtering, and there is no mention of associated group delays in the specifications. Can I therefore assume that the CODEC contains no such filtering?
To be specific I wish to know how long does it take to get a sample into the CODEC over I2S and for the corresponding analog conversion to be seen on the line-out. I can calculate i2s FIFO times within the MCU so this is not to be a consideration. I need to know does the unit have any internal FIFO, if so how many samples, (is it fixed), is there any digital decimation-filtering, if so what is the group delay.
For my closed loop system, group delay is utterly critical. Ideally I would like to see samples (let us say @96K) leave the MCU and that 10uS later the analog line-out reflects this sample.
Do you have any info and/or experience in this regard?
Many thanks
Aidan