These are identical IC die (bare silicon) in two different packages. The packages involve two totally different processes likely designed and built in two different packaging houses. I worked for Motorola when the Freescale spin off happened. At that time we did some packaging in house, and used Amkor for others. Our particular chips (non Freescale) went to Amkor. There have been many changes in the semiconductor world since then.
The QFP is made by attaching the bare die to a stamped steel lead frame where the frame itself becomes the actual pins on the chip. Then tiny wires are bonded to pads on the die and pads on the lead frame. There is usually a one to one correspondence between the pads on the IC die and pins on the QFP. The IC die layout determines the pinout. Then the frame is overmolded in plastic and the frame sheared off and ends bent (formed) to become the pins.
The BGA's are made differently, resulting in a different pinout, and sometimes on complex chips, some functions are omitted. These become NC pins, or ground pins. The bare IC die gets "bumped." This process attaches tiny solder balls to the pads on the chip where the bond wires would have gone in the QFP. The bare die is flipped over and soldered directly to a complex multilayer PC board which becomes the base of the chip. The bottom side of this PC board has (144 in this case) gold plated pads which will have solder balls attached in the final assembly step. After die attach, the package gets overmolded in plastic, flipped over and has the balls mounted. The pinout of the final BGA is determined by the routing of the multilayer PCB that becomes the base. This is a tradeoff between ideal pin placement and cost (number of board layers). The constraints are grouping of like functions, power pins and ground (for optimum bypassing) analog VS digital functions (don't put a high speed bus in the middle of your digital pins) and functions that are not often used and can be omitted. The whole thing is usually done by an iterative autorouter that proposes several possible solutions, which wind up being reviewed in several long boring meetings, where everyone argues for what they think is important......I spent too much time in some of those meetings, we did GHz level CMOS RF chips which have their own constraints.
When I see NC I read it as No Connection. That is a placeholder with no function - in this case - not wired internally?
This is usually the case. It can be verified by an ohmmeter, but NEVER touch ohmmeter probes directly to the pins of a modern low voltage CMOS IC. Most meters put from 6 to 20 volts (some HP's) out through their test leads in the "OHMS" function. The current is high enough to fry the on chip protection diodes, rendering a pin, and maybe the entire chip useless. Instead put a 100K or higher resistor in series with your leads and use the highest (megohm) range. An NC pin will read "INFINITE" or "OPEN" while ANY reading confirms some connection. When hand soldering an IC with blind connections (like a BGA) put the chips on the board first. Then use this technique to verify that there is some reading from each pin to ground or anywhere else on the board.
Laying out a PC board of this magnitude requires some experience with high speed digital signals, and PCB layout experience. If you have never done this before, and don't understand terms like "ground bounce" and "crosstalk" you may get a board that appears to work, but randomly resets or generates errors. You may wind up doing the board over a few times, but it will be an educational experience.......frustrating, but educational.