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Thread: RAM and I/O for 6502?

  1. #1
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    RAM and I/O for 6502?

    I have an interest in using a Teensy 3.6 as the I/O, glue and RAM for a 65C02.

    For those that don't know, the 65C02 is an 8-bit processor with a 16-bit address bus. Meaning it can only address 64K.

    The 65C02 commonly runs between 1 - 14MHz. My project would run between 1 - 4 MHz tops.

    I'd like to use the Teensy 3.6 as direct RAM at the very least. So the 65C02 would update it's program counter and read/write to the Teensy as if it were 64K of SRAM.

    So, my question is, would the Teensy be able to handle 1-4MHz external changes from the 65C02?

    At 1 MHz, the 65C02 spends 500ns doing stuff internally and leaves the other 500ns in limbo...where it doesn't touch the address/data bus. Which means the Teensy would have to do general array lookups, etc. within that 500ns to respond to the 65C02. Of course, 2MHz would half that time, etc.

    I realize this is a job for assembly. So I thought I would start really small with C and drive the 65C02 at 10-50 kHz first.

    What are your thoughts on such a project?

    BTW, this has been done with a Propeller at a maximum speed of 1 - 1.2MHz.

    Thanks!

  2. #2
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    Sounds like an interesting project. It's been several decades since I played with a 6502 but from what I remember you'll need 26 GPIO pins for this (16 for addressing, 8 for data, 1 for clock, one for R/W).

    In terms of software you'll probably want to group the pins so you can read/write ports in 8+ bit chunks instead of 26 separate digitalReadFast()/digitalWriteFast()'s each cycle, but other than that I don't see any serious obstacles.

    Regarding the hardware you'll need 5V->3.3V level shifters on all the pins because the Teensy 3.6 isn't 5V tolerant; obviously the data pins will need to be bidirectional but the address, clock, and R/W lines will be input only so that simplifies things a little.

  3. #3
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    Thanks for your reply.

    Regarding the 5V, the 65C02 can happily run at 3.3V up to 8MHz. So no level shifters required. What I'm mostly curious about is if the Teensy 3.6 can handle pin changes in the 1-4MHz range.

    Thanks.

  4. #4
    Senior Member+ Frank B's Avatar
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    This depends more on your code (programming skills) than the teensy.

  5. #5
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    Right. But the best programmer in the world couldn't coax 80,000 GHz performance out of that thing. Everything has limits.

    Ignoring my skills or lack of skills...would, say, 4 MHz be way too fast for the Teensy 3.6 to handle (external pin changes) and still have enough time to fetch bytes from an array, set other pins, etc.?

    Thanks

  6. #6
    Senior Member+ Frank B's Avatar
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    It really depends on your code. Driving 26 Pins takes time - You can save a lot of time if you group the pins the best possible way and use register-read/writes with 32-BIT accesses to the Teensy-ports. 4MHz will be hard.
    For a single pin (clocking the 6502?), it's much easier. So just try it :-) (for example, if you use the spi-device, it can produce a 30MHz clock easyly)
    Measuring with YOUR code can tell you more than we can guess..

    For example, use the blink-example and remove the delays. The result will not be fast (it can be done _much_ faster with a write to the gpio-pin-togle-register), but it may give you an idea.
    Next ,use your own loop ( while(1) {} ) - not the "inbuilt" arduino-loop, which calls yield() in the background and is pretty useless for 95% of all sketches.
    Last edited by Frank B; 11-29-2016 at 06:21 PM.

  7. #7
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    Quote Originally Posted by cbmeeks View Post
    Regarding the 5V, the 65C02 can happily run at 3.3V up to 8MHz. So no level shifters required.
    Cool. I didn't know 70's / 80's tech could run at 3.3V.

    What I'm mostly curious about is if the Teensy 3.6 can handle pin changes in the 1-4MHz range.
    I would think it's doable. Last year I did a project that used 11 pins to send 8 bit data between a Raspberry Pi and a T3.2 (8 data, 1 clock, 1 Pi signal Teensy, 1 Teensy signal RPi) and had no problems up to about 800Khz; beyond that RPi was the limiting factor.

  8. #8
    Senior Member PaulStoffregen's Avatar
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    You'll definitely want to choose the pins carefully, so the data bus is on PTD0 to PTD7. Sadly, there aren't 16 pins from any one native port exposed. You could connect the low 12 bits of the address bus to PTC0 to PTC11. Maybe the upper 4 bits could connect to PTA14 to PTA17. Then you could read the 16 bit address with two native reads, and assemble them to a 16 bit number using just 1 shift and logical or.

    It'll be a challenge to get the whole thing into less than 40 instructions (for approx 250 ns response), but might be possible.

  9. #9
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    Thanks Paul!

    That was very helpful.

  10. #10
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    Hi, just found this old post and I was wondering if you managed to get it to work at desired speed.
    I was working on a similar case and I got the Teensy to reach 1.2Mhz without over clocking. At 240Mhz, you can get the 6502 to run at 1.7Mhz, although I’m cheating with an asymmetrical cycle (very short phase 1 to compensate for the longer phase 2).
    I’ve only used simple C, I guess going with assembly should make it faster.

  11. #11
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    But.. what can a 6502 better than a teensy and a teensy can emulate a 6502..

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