teendy 3.6 addon board?

pix-os

pix-os

Well-known member
hey all, i looked at the kinetis k66 datasheets for a brief moment, and found out that it supports a "flex bus" for external memory

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf

so i am thinking it might be usefull to create a addon board at some point which for example has some external s(d)ram on it so we can have screenbuffers out of the mcu and in external ram.

sadly i don't have time/skills enough to figure the datasheets out, design a pcb, order it and assemble it. but if anyone is going to make a board for it: i'd be glad to put money in it. :)

what are your thoughts for the teensy 3.6 having usage of the flex bus?
 
pix-os said:
hey all, i looked at the kinetis k66 datasheets for a brief moment, and found out that it supports a "flex bus" for external memory

http://cache.freescale.com/files/microcontrollers/doc/app_note/AN4393.pdf

so i am thinking it might be usefull to create a addon board at some point which for example has some external s(d)ram on it so we can have screenbuffers out of the mcu and in external ram.

sadly i don't have time/skills enough to figure the datasheets out, design a pcb, order it and assemble it. but if anyone is going to make a board for it: i'd be glad to put money in it. :)

what are your thoughts for the teensy 3.6 having usage of the flex bus?
Click to expand...

I'm not sure if this is related, but Paul mentioned earlier (https://forum.pjrc.com/threads/24633-Any-Chance-of-a-Teensy-3-1?p=91701&viewfull=1#post91701)
Many external bus signals won't be accessible, so the door will be closed to adding a SDRAM chip.
Click to expand...
 
sad thing about spi ram: i can't tell the compiler to look at a specific address to put a huge array of variables (a screenbuffer) in, so i would have to read part of it, do calculations with it, then put it back.

aka: slows things down, also the SPI BUS ain't as fast as parallel RAM

thanks for the suggestion anyway
 
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