Hi,
the topic says it
First, pleae excuse that i can't show the code.. nobody wants to read 3000 lines.
If it is really needed i can invest 2 hours next weekend and write a miniml example.
I already mentioned it some weeks ago:
If you use two channels, the first reads and the other channels writes (asynchronously) to the same RAM-Area, the reading channel reads wrong values (sometimes!). Or, the writing is corrupt (?) (hard to say..)
My Question: Is this
a) documented
b) a silicon bug ?
And, more important, is there a workaround ?
Background: I'm using DMA to continously transfer a 153KB area to the ILI-Display (SPI) (-> reading channel)
To speed up things i fill certain areas in the RAM with a concurrent DMA-Channel.
The display shows random(!) black and white lines, ~2-3 times a second.
This does NOT happen, when filling the RAM with a loop in c.
the topic says it
First, pleae excuse that i can't show the code.. nobody wants to read 3000 lines.
If it is really needed i can invest 2 hours next weekend and write a miniml example.
I already mentioned it some weeks ago:
If you use two channels, the first reads and the other channels writes (asynchronously) to the same RAM-Area, the reading channel reads wrong values (sometimes!). Or, the writing is corrupt (?) (hard to say..)
My Question: Is this
a) documented
b) a silicon bug ?
And, more important, is there a workaround ?
Background: I'm using DMA to continously transfer a 153KB area to the ILI-Display (SPI) (-> reading channel)
To speed up things i fill certain areas in the RAM with a concurrent DMA-Channel.
The display shows random(!) black and white lines, ~2-3 times a second.
This does NOT happen, when filling the RAM with a loop in c.
Last edited: