I2C clock speed 40 kHz valid?

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DaQue

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I'm working on reverse engineering talking to a very old chip (2000) and when I measure valid command sent to it in a working circuit the clock pulses are 25 us leading edge o leading edge. The 1st clock is about twice as wide as the rest. Does this seem odd to anyone else. I guess it's still valid, right?
 
It just seems awefully slow. Data sheet says it supports 400k. I guess the old micro in pager could just be bit banging it.
 
doesnt hurt to start low, once you see it working you can go higher
lower rates tend to be more stable speciallly over longer distances
 
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