dauntless89
Well-known member
I was reviewing the table in the Teensyduino FAQ section, or whatever it's called, that lists the ideal PWM carrier frequencies for each resolution setting. I am using PWM to control electromagnetic servos in my project, and need to maintain probably 12-bit resolution. The carrier frequency requirement has yet to be determined, but I had a couple questions regarding my understanding of how the PWM timers work in the T3.6.
It's clear that the ideal frequency is dependent on some internal timing parameter because clock speed is a factor. What is the formula for determining the ideal frequency at a given CPU speed and PWM resolution? If it matters, I'm using pins 29 and 30 (FTM2) and won't be using any others.
It's also clear that the listed values are a limit. Will deviating from these "ideal" frequencies impose an efficiency penalty on the processor? For example, if my 12-bit resolution's ideal frequency is ~14.6kHz, will setting it to 12kHz cause any kind of an internal harmonic or phasing problem that could effect the execution of the code? If so, can this be avoided by setting it to something that can evenly divide the "ideal" frequency? Say, 7.3kHz, 4.86kHz, or 3.65kHz?
Thanks.
It's clear that the ideal frequency is dependent on some internal timing parameter because clock speed is a factor. What is the formula for determining the ideal frequency at a given CPU speed and PWM resolution? If it matters, I'm using pins 29 and 30 (FTM2) and won't be using any others.
It's also clear that the listed values are a limit. Will deviating from these "ideal" frequencies impose an efficiency penalty on the processor? For example, if my 12-bit resolution's ideal frequency is ~14.6kHz, will setting it to 12kHz cause any kind of an internal harmonic or phasing problem that could effect the execution of the code? If so, can this be avoided by setting it to something that can evenly divide the "ideal" frequency? Say, 7.3kHz, 4.86kHz, or 3.65kHz?
Thanks.