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Thread: Proper use of Teensy 3.x AGND

  1. #1
    Senior Member+ defragster's Avatar
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    Proper use of Teensy 3.x AGND

    Working with someone where PCB under development showed AGND routed to GND I had a hard time definitively advising against the need or desire for that to support simple pots.

    So it seems the Teensy uses a different sort of grounding system to what I'm used to. There must be some sort of connection on the Teensy from digital ground to the ADC circuitry. I haven't come across that in the past where there has been a separate AGND.

    If it all works fine without requiring a connection to AGND then I can just get rid of it.
    Not sure about the alternate hardware that gave that understanding and I could not find a single specific point of reference to back up my general understanding of why that was not needed and not good for Teensy 3.x's - when the AGND has some higher purpose. Using a pre-production PCB confirmed it worked but wasn't convincing - so I linked to PJRC store's two 16 bit Audio shields and the Audio Tutorial board and that was as close as I could get.

    Paul or someone care to offer some guidelines or links I missed?

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    Did not get the precise problem
    AGND and GND are connected on Teensy via a 600 ferrite. AGND is NOT used on teensy other to connect to VREFL and VSSA.
    So, if I apply the rule, to have only one connection between analog and digital ground, it should be the one on teensy.
    In how far any other connection of VREFL (lowest analog level) directly to digital ground generates ground loops, other EEs should comment on.

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    Problem was 'prior knowledge' by this PCB Maker told him to tie GND to AGND as learned on 'another' system. I'm not an EE either - but in addition to the ferrite there are caps there to make a cleaner GND? Connecting would spoil the intended and proper use of AGND - but I don't know what that use case is exactly. Not finding details on that it seemed others new to Teensy may make that same less than ideal assumption.

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    Senior Member Epyon's Avatar
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    It is indeed common practice to tie AGND and GND together at one point on your PCB if you integrate the micro on the board yourself. With Teensy this is done on its own carrier PCB, so maybe that is where the confusion arises from? I have never seen caps between AGND and GND though, not sure this would do anything.

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    @Epyon - maybe it was my poor reading of the schematic - but it looked like I saw caps and the ferrite hanging out on the Teensy PCB - maybe they are for other purposes?

    This is a clip of the T_3.6 schematic - the red line replaces the AGND line that loops all the way down and around:
    Click image for larger version. 

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    AGND is part of this thread too.

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    Senior Member Epyon's Avatar
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    I'm not sure if I understand your question completely. It is good practice to place a ferrite bead between the GND and AGND connection to mitigate ground level noise from (high power) digital circuitry connected to GND (e.g. servos) into AGND, where your sensitive analog circuitry is located. But you should keep this connection the only one between GND and AGND.

    The caps are placed between AREF and AGND to filter out noise on the AREF input.

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    Quote Originally Posted by Epyon View Post
    I'm not sure if I understand your question completely. ...
    I 'generally' understand it - from reading many forum posts. I was hoping to get a clearer note from Paul or other in 'one place' that would inform somebody holding a Teensy when and why and how the best use of that design feature.

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    I think the only time you really need to connect something to the Teensy AGND is when your using an external Reference.

    EDIT.
    Correction, the external reference should only be connected to the AGND if it is a sense or kelvin connection(eg MAX6071). You should not connect a shunt style (eg. TL431) reference to the AGND. No current should pass through the AGND connection.
    Last edited by Donziboy2; 08-17-2017 at 12:35 PM.

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    I assume that DAC outputs should be referenced to AGND, not GND?
    As well as sense voltages for ground reference. Which kind of depends on what you're sensing and how it's otherwise hooked up and perhaps isolated.
    If you need to establish a ground for a sensor (say, an inductive ring current sensor) then AGND + analog input port seems like the best option.
    If you're measuring "voltage between power rail and actual ground" using a resistive divider, you're going to be shorting AGND to GND kind-of no matter what, unless you re-buffer with an opamp with differential output.

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    DAC is sourced from 3V3 and GND.
    AGND is the GND connection of the reference voltage of the micro's ADC. It is not a grounding point for analog signals. Any current passing through AGND will cause your ADC Reference voltage to be inconsistent/noisy or change your low end range/gain of the ADC.
    Last edited by Donziboy2; 08-17-2017 at 09:42 PM.

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    Inspecting the schematics I note for Analog
    5 lines
    -VDDA
    -VSSA

    -VREFH
    -VREFL

    -VREF_OUT

    Obviously VDDA and VSSA are the supply voltages for ADC. They should be within 0.1 V from VDD and VSS (e.g. from K20P64M72F1.pdf)
    In schematic they are connected with ferrites to VDD and VSS of the MCU
    VDDA is 'AC grounded' via 2.2 uF capacitor to VSSA

    Analog signals can vary between VREFL and VREFH
    VREFH is connected via 470 Ohm to VDDA and is brought out as VREF
    VREFL is connected directly to VSSA and is brought out as AGND
    VREFH is 'AC grounded' via 0.2 uF to VSSA

    VREF_OUT is DC floating ('AC grounded' via 0.1 uF to VSSA) and not brought out

    So my conclusion would be:
    All analog buffer/drive/filter connected to Teensy should really be powered from VREF and AGND
    All digital part (e.g. I2C switches) should be connected to 3.3V and GND
    So 'good' mixed digital/analog boards should have 4 power lines (3.3V,GND for digital and VREF, AGND for analog)
    Is this correct?

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    Time for some RTFM.

    From MK20DX64VLH7
    31.6.1.2 Analog voltage reference pins
    In addition to the analog supplies, the ADC module has connections for two reference
    voltage inputs used by the converter:
    VREFSH is the high reference voltage for the converter.
    VREFSL is the low reference voltage for the converter.
    The ADC can be configured to accept one of two voltage reference pairs for VREFSH and
    VREFSL. Each pair contains a positive reference and a ground reference. The two pairs are
    external, VREFH and VREFL and alternate, VALTH and VALTL. These voltage references are
    selected using SC2[REFSEL]. The alternate voltage reference pair, VALTH and VALTL,
    may select additional external pins or internal sources based on MCU configuration. See
    the chip configuration information on the voltage references specific to this MCU.
    In some packages, the external or alternate pairs are connected in the package to VDDA
    and VSSA, respectively. One of these positive references may be shared on the same pin
    as VDDA on some devices. One of these ground references may be shared on the same pin
    as VSSA on some devices.
    If externally available, the positive reference may be connected to the same potential as
    VDDA or may be driven by an external source to a level between the minimum Ref
    Voltage High and the VDDA potential. The positive reference must never exceed VDDA. If
    externally available, the ground reference must be connected to the same voltage
    potential as VSSA. The voltage reference pairs must be routed carefully for maximum
    noise immunity and bypass capacitors placed as near as possible to the package.
    AC current in the form of current spikes required to supply charge to the capacitor array
    at each successive approximation step is drawn through the VREFH and VREFL loop
    . The
    best external component to meet this current demand is a 0.1 μF capacitor with good
    high-frequency characteristics. This capacitor is connected between VREFH and VREFL
    and must be placed as near as possible to the package pins. Resistance in the path is not
    recommended because the current causes a voltage drop that could result in conversion
    errors. Inductance in this path must be minimum, that is, parasitic only.
    End of Excerpt

    So what that says is VREFH and VREFL feed the ADC SAR hardware, providing the high and low voltage references for measurements.
    If you want to have an AGND plane for all your analog stuff I suggest not connecting it to AGND on the Teensy, but connect it to GND in only one place. The connection for AGND and GND planes is normally accomplished with a 0R resistor connecting the two or with a trace connection(normally a custom component that keeps them separate on the schematic but connects them on the PCB). With only one connection point it prevents current from passing along the analog circuits and inducing unwanted noise.

    And again the only thing that should connect to VREF and AGND on the Teensy is a dedicated reference voltage device. Use AGND if it is a sense or kelvin connection(eg MAX6071). You should not connect a shunt style (eg. TL431) references to the AGND.

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    Quote Originally Posted by Donziboy2 View Post
    So what that says is VREFH and VREFL feed the ADC SAR hardware, providing the high and low voltage references for measurements.
    If you want to have an AGND plane for all your analog stuff I suggest not connecting it to AGND on the Teensy, but connect it to GND in only one place. The connection for AGND and GND planes is normally accomplished with a 0R resistor connecting the two or with a trace connection(normally a custom component that keeps them separate on the schematic but connects them on the PCB). With only one connection point it prevents current from passing along the analog circuits and inducing unwanted noise.
    Are you saying that the ferrite connection of AGND to GND onboard all Teensies do NOT count as unique connection of analog ground and digital ground and that one should have such a connection also outside the teensy board? No problem with me, but I would like to know a reason why the ferrite one does not count.

    And again the only thing that should connect to VREF and AGND on the Teensy is a dedicated reference voltage device. Use AGND if it is a sense or kelvin connection(eg MAX6071). You should not connect a shunt style (eg. TL431) references to the AGND.
    thanks for clarification, I understand the internal use of VREF(H/L)

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    Senior Member+ defragster's Avatar
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    Thanks Donziboy2 and WMXZ - that looks better than any forum or other summary in one place I came across.

    Short Version::
    > AGND is a specific reference pin for controlled ADC usage to be kept separate from all other Teensy GND if using for that purpose - see above ...

    > If not using AGND for ADC measurement, there is no need to use or connect to AGND or tie it to GND for other Digital or Analog usage.

    > The only thing that should connect to VREF and AGND on the Teensy is a dedicated reference voltage device. Use AGND if it is a sense or kelvin connection(eg MAX6071). You should not connect a shunt style (eg. TL431) references to the AGND.
    If reading of P#15 is right -
    Integrating AGND into GND for normal analog usage can result 'unwanted noise' with another path to GND that is 'distorted' by the presence of the ferrite - which is designed to provide a cleaner/independent ground AGND for ADC reference.
    <edit> : Donziboy2, others: Let me know if my 2 line summary is lacking or misleading.
    Last edited by defragster; 08-19-2017 at 06:04 AM. Reason: post #17 WMXZ note

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    Quote Originally Posted by WMXZ View Post
    Are you saying that the ferrite connection of AGND to GND onboard all Teensies do NOT count as unique connection of analog ground and digital ground and that one should have such a connection also outside the teensy board? No problem with me, but I would like to know a reason why the ferrite one does not count.
    What I mean is its a bad idea to pass the current from your analog circuits through the AGND pin on the Teensy, it will cause a lot of unwanted noise and could also cause your voltage range to shift depending on the Vdrop across the ferrite.
    See picture below, left side is the correct way. Right side will lead to noise and other odd behavior since your analog circuit current will be passing through the ferrite.
    Click image for larger version. 

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    I updated my p#14 above. In searching for a clear 'when to use/avoid' AGND I even went to the 'Audio System Design Tool' page to see if it made note of it. Indeed AGND is not 'Audio GND' but until I went to the PJRC store and saw the pages for the Audio Adapter and even the PT8211 using 'GND' - I wasn't sure that AGND might not appear there - which it does not by design.

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    Quote Originally Posted by defragster View Post
    <edit> : Donziboy2, others: Let me know if my 2 line summary is lacking or misleading.
    maybe you could add
    The only thing that should connect to VREF and AGND on the Teensy is a dedicated reference voltage device. Use AGND if it is a sense or kelvin connection(eg MAX6071). You should not connect a shunt style (eg. TL431) references to the AGND.
    as of prev post #12 by Donziboy2

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    A (final?) question,
    Assume I configure ADC to use external reference (i.e. the 3.3V as seen in schematic), can (should) I use the VREG-AGND combo to generate the Vbias of the (last) analog buffer?

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    Not sure what you mean WMXZ, need more details.

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    Quote Originally Posted by Donziboy2 View Post
    Not sure what you mean WMXZ, need more details.
    Assume
    - I configure as reference (REFH, REFL) for ADC and not (VALTH,VALTL) which is AFAIK 1.2 V.
    - for op-amp buffer I would like to have a Vbias = (VREFH-VREFL)/2
    - can I use VREFH and VREFL (AKA VREF and AGND) to generate (via voltage divider, say 2 x 150k) the desired Vbias?
    - Paul uses in the ADC picture 3.3V and AGND to generate the 0.6V default bias voltage, but this for (VATLH,VALTL).

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    Quote Originally Posted by WMXZ View Post
    Assume
    - I configure as reference (REFH, REFL) for ADC and not (VALTH,VALTL) which is AFAIK 1.2 V.
    - for op-amp buffer I would like to have a Vbias = (VREFH-VREFL)/2
    -I'm assuming you mean the ADC is defaulting to the standard 3V3 reference.
    -If my above is correct you want a 1.65V reference.

    Quote Originally Posted by WMXZ View Post
    - can I use VREFH and VREFL (AKA VREF and AGND) to generate (via voltage divider, say 2 x 150k) the desired Vbias?
    - Paul uses in the ADC picture 3.3V and AGND to generate the 0.6V default bias voltage, but this for (VATLH,VALTL).
    -If your feeding something with very high impedance like an op-amp, yes you can do that. I recommend adding a 10n to 0.1uF cap to the divider to keep noise under control.
    EDIT... You can also get the same result from putting the divider on the 3.3V rail, the only difference would be the 470R resistor feeding the AREF pin on the Teensy.
    -not sure what picture you are referencing. My understanding is the 1.2V reference can be accessed from the VREF_OUT pin on the MCU, which sadly only connects to an external capacitor, so we dont get pin access unless we do some hacking.
    Last edited by Donziboy2; 08-20-2017 at 02:13 AM.

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