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Thread: High sampling ADC for teensy 3.6

  1. #1

    High sampling ADC for teensy 3.6

    Hello everyone,

    I am working on a project where I need to sample a sine wave then fit it to get it's magnitude, I need to cover the range of 1 Hz to 1 MHz.

    I have already accomplished the range from 1 Hz to 100 kHz with the internal ADC of the teensy 3.6 and I connected it to python to fit the signal, but I am struggling with the high frequency due to the fact that I need a very fast sampling ADC (5 to 10 MSPS). I thought I would be able to use LTC2315-12 which uses spi to interface with the controller and can accomplish 5MSPS, but I need the spi clk to be 89.7 MHz exactly which seems to be above the teensy maximum. The other way was to use an ADC with a parallel interface and generate the clk from the teensy to controll it but I am not sure if this would be efficient since I would have to overclock the controller and keep it running to read the ports on the maximum speed.

    I was wondering if anyone worked in this frequency range and has any suggestion and also if I wanted to use the parallel interface ADCs is there any timer/interrupt in the teensy 3.6 that can be set up to 5 MHz?!

    Thanks in advance.

  2. #2
    Senior Member+ Theremingenieur's Avatar
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    If you know already that it’s about just a sine wave, no hi-res sampling is required just to get the magnitude. A Schottky Diode rectifier is sufficient to get a peak value which can be sampled at much lower rates. Then in software, you might add the lost junction voltage (about 0.3V) and that’s it

  3. #3
    Senior Member PaulStoffregen's Avatar
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    I would agree, an analog envelope follower circuit would be much simpler.

    But if you *really* want to try running faster, you could edit kinetis.h to overclock F_BUS. The maximum SPI clock speed depends on F_BUS, not F_CPU. Even then, achieving 5 MSample/sec will be quite difficult....

  4. #4
    Thank you, I am looking for a good envelope follower circuit that can work in the range between 100 kHz to 1 MHz. I tried overclocking the F_BUS but I started losing some information and it doesn't work like it should. Also as Paul said reaching 5 MSample/sec would be difficult (if not applicable). I thought that if someone use a high sampling frequency ADC before it would be helpful

  5. #5
    Another thing that can be done if you know it's a periodic sine wave is to take advantage of statistics and aliasing.

    For example, if you sample a 1MHz sine wave at 1000050 Hz over enough cycles then you have a 50Hz sine wave show up in your sample stream.

    So, if you're using a high frequency ADC you can take advantage of the fast sample/hold times but you don't need to clock it so fast nor take so many samples per second.

    With fast sample/hold times then the same principle is true using 100 kHz sample rate to sample a 1 MHz sine wave. In the case of 100.0000 kHz sample rate and 1.000000MHz, you would get something near a DC level because you would be sampling the sine wave at exactly the same phase on every sample. Offset the sample clock by 1kHz and then you see a 1 kHz sine wave in your measurement, etc...

    So there is one other way to approach this. The analog peak detector is great for simplicity.

  6. #6
    Thank you for your suggestion. I was also trying this out and it gave really good results too. The only issue I have now is not being able to sample at low frequencies (lower than 1 kHz) without having the PDB getting stuck in that range and it won't go above 1 kHz anymore.

  7. #7
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    Hello everyone,

    I am working on a project where I need to sample a sine wave (AC volatage source) then fit it to get FFT, I need to cover the range of 1 Hz to 480Hz (six harmonics) in Frequency domain, because I need to do the THD calculation of the signal.

    I want to know if the Teensy 3.6 has the capacity to do this job. Could you help me?

  8. #8
    Senior Member+ Theremingenieur's Avatar
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    The answer, without you giving more details, is “it depends”.
    Potential limitations will not come from the Teensy itself which has enough computing power “under the hood” to do the FFT either with 32bit integer arithmetic which means you might calculate down to 0.00000002% FS or with 32bit float arithmetic which in theory and with thoughtful programming might even give better results.
    Limitations will thus come from the A/D conversion which will be limited by a 72dB SNR when using the internal ADC or from whatever external ADC you plan to use.

  9. #9
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    Quote Originally Posted by jdvr1994 View Post
    Hello everyone,

    I am working on a project where I need to sample a sine wave (AC volatage source) then fit it to get FFT, I need to cover the range of 1 Hz to 480Hz (six harmonics) in Frequency domain, because I need to do the THD calculation of the signal.

    I want to know if the Teensy 3.6 has the capacity to do this job. Could you help me?
    Yes, it's capacity to do a lot more than that. I used to get the spectrum up 1.2MHz at sampling frequency 2.4MHz with DMA.
    Last edited by abusaude; 02-14-2019 at 05:12 AM.

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