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Thread: Completion interrupts for DMA channels -- 32 channels but only 16 interrupt vectors

  1. #1
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    Completion interrupts for DMA channels -- 32 channels but only 16 interrupt vectors

    Hi,

    There are 32 DMA channels, but only 16 dma irqs/interrupt vectors, as can be seen in chapter "3.4 Interrupt channel assignments" of the Teensy 3.6 chip manual (MK66FX1M0VMD18).

    From reading the code of DMAChannel.attachInterrupt() it is not obvious to me how the destinction between, e.g., DMA channel 15 and 31, would be made.

    Both of them share an interrupt vector table entry, so does that mean that:
    1. Only one interrupt handler can be set for dma channel 15 and 31.
    2. Two interrupt handlers can be set (how does that work?), but both ISRs will be called when dma channel 15 or 31 completes.
    3. Two interrupt handlers can be set, and each of them is called when their corresponding dma channel completes.


    Which of the above is true?

  2. #2
    Senior Member PaulStoffregen's Avatar
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    So far, nobody actually uses DMA channels 16 to 31. Or at least none of the libraries I've written and maintain use them.

  3. #3
    Senior Member+ KurtE's Avatar
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    I believe the answer 1 is correct, you can only set one Interrupt handler for channel 15 and 31, and that handler will be called for any DMA interrupt for channels 15 or 31. So if you are using both, you need to check in your interrupt handler at the different registers to decide why your ISR was called.

    Side note: looks like the DMAChannel code in cores\teensy3 will only allow you to use up to 16 channels within that code base... At the top of DMAChannel.cpp there is:

    Code:
    #if DMA_NUM_CHANNELS <= 16
    #define DMA_MAX_CHANNELS  DMA_NUM_CHANNELS
    #else
    #define DMA_MAX_CHANNELS 16
    #endif

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    Thanks for mentioning the code snippet. I actually read it but interpreted it wrong. So limited to at most 16 channels it is.

    I wonder what the purpose of 32 DMA channels is when they don't have their own ISR. What is the advantage to using only 16 channels, then?
    I guess you could chain more DMA channels in case you do not care about getting notified about their completion, but still want to set up a lot of DMA transfers.

    It surely would make the DMAChannel class a lot more complex/harder to predict, so I understand that it was limited to 16 channels.

  5. #5
    Senior Member PaulStoffregen's Avatar
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    Quote Originally Posted by maelh View Post
    I wonder what the purpose of 32 DMA channels is when they don't have their own ISR.
    I like to think of it as a typical Hollywood action movie sequel. They've just got to 1-up & outdo the last movie: bigger explosions, faster car chases, larger guns/weapons, more sexual innuendo, and so on, even if all that stuff doesn't add much substance.

    What is the advantage to using only 16 channels, then?
    The honest reality is the first 16 are plenty for all the DMA-based libraries which currently exist.

    The main advantage to only using the first 16 is simpler, faster interrupt code. If we supported interrupts on all 32, then a dispatch ISR would be needed, like is used with attachInterrupt(). That adds several cycles of overhead to the interrupt response time, which maybe isn't a huge deal at 180 MHz, but it would serve little purpose since the first 16 are plenty.

    Yeah, it would have been nice if Freescale had allocated 32 interrupts. But they didn't design the chip that way. I could blindly speculate about some of the possible trade-offs they faced, but the truth is I would just be guessing. I don't know anyone at Freescale involved in these engineering choices.

    Perhaps someday DMAChannel.h might be extended to offer a "no interrupts" object, which would allocate to one of those other 16 channels. Some libraries don't use the interrupts. WS2812Serial is one example. OctoWS2812 uses 3 channels, but only 1 with an interrupt. But since nobody has yet needed more channels (the first 16 have never yet all been used up, at least not by anyone who's said anything), so making this change to DMAChannel.h is not a priority.

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    Quote Originally Posted by maelh View Post
    I wonder what the purpose of 32 DMA channels is when they don't have their own ISR. What is the advantage to using only 16 channels, then?
    Maybe for the same reason that the K20 chip of the Teensy 3.2 has SPI1_SIN and SPI1_SOUT but no SPI1_CLK and is consequently useless.
    Maybe they planned for it, but had to trump it.

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    Quote Originally Posted by PaulStoffregen View Post
    Perhaps someday DMAChannel.h might be extended to offer a "no interrupts" object, which would allocate to one of those other 16 channels. Some libraries don't use the interrupts. WS2812Serial is one example. OctoWS2812 uses 3 channels, but only 1 with an interrupt. But since nobody has yet needed more channels (the first 16 have never yet all been used up, at least not by anyone who's said anything), so making this change to DMAChannel.h is not a priority.
    That would be good approach, if it was to be implemented some day (though I agree, there is no pressing need for it). I was mostly interested in the design decisions/rationale behind the chip/libraries while I am learning about DMA. Teensy/its libraries certainly make programming microcontrollers easier, thanks.

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