DAC latency

[floating.]

Does anyone know the time it takes from a write to the DAC for the output to reflect that?

This is the relevant code -- no DMA or anything fancy. The interrupt handler works fine, and I know that it gets called correctly once every 13 microseconds.


volatile int g_bic; // Global Bit Interrupt Counter

// in setup
pinMode(DAC, OUTPUT); // the DAC
analogWriteResolution(12); // set DAC operation to 12 bit

void start_bit_timer() {
bit_timer.begin(bit_intr_handler, BIT_TIME);
g_bic = 2047;
}

// writing to the DAC every 13 microseconds
void bit_intr_handler() {
analogWrite(DAC, data[g_bic]);
if (g_bic > 0) {
g_bic--;
} else {
bit_timer.end();
}
}

Would it be better to use DMA?

 

[Theremingenieur]

Using the internal 16 word DAC ring buffer always preloading 8 samples in one half while the other 8 samples are output, the PDB to trigger conversions at regular intervals and using the ring buffer top and watermark flags to trigger interrupts to reload the buffer in 8 word batches, sample rates up to 600kHz might be achieved which corresponds actually to a 1.6us conversion time. At these speeds, the output signal risks to be degraded by a low impedance load - best is buffering it with a high impedance - low capacitance voltage follower, i.e. a CMOS op amp.

 

[floating.]

Thanks. I did some approximate measurements with a scope and got comparable results. It took about 660 ns for the output to start to change, and depending on he target level, it got within 10% of that level within 220 - 650ns. So the total is up to 1.3 us (with eyeballed voltage levels), which is definitely in the right ballpark.

 

[manitou]

Data sheet suggests 15 us for DAC settle time, but in practice, you might get away with 1 us.
See https://forum.pjrc.com/threads/26036-Fastest-DAC-speed-possible-for-Teensy-3-1-using-Arduino
and https://forum.pjrc.com/threads/4521...ugh-Teensy-DAC?p=171434&viewfull=1#post171434

DAC DMA with PDB https://forum.pjrc.com/threads/28101-Using-the-DAC-with-DMA-on-Teensy-3-1

 

[PaulStoffregen]

The DAC speed can vary quite a lot depending on the capacitive load. If you test with only an oscilloscope and then later use it to drive a lengthy cable or wire with more capacitance, the speed might end up less than you expect.

 

[Theremingenieur]

The DAC speed can vary quite a lot depending on the capacitive load. If you test with only an oscilloscope and then later use it to drive a lengthy cable or wire with more capacitance, the speed might end up less than you expect.

That's why it is seen as common good practice to buffer the DAC output signal, i.e. with the help of a CMOS rail-to-rail op-Amp before it leaves the actual circuit board.