audio band Sample and Hold

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philip.porhammer

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I need to build a 4 channel Sample and hold 10 to 14 bit linear ADC to DAC what would give me the highest sample rate? would this work:pROP_SHIELD Prop Shield With Motion Sensors ?
 
There are too much details missing about what you want to achieve. If it was about audio sample and hold (as suggested in the thread title) why would you use motion detectors from the prop shield?

Normally, sample and hold is about taking a single precise snapshot of a complex signal for measuring/signal analyzing purposes. Thus, the question about maximum sample rate seems rather contradictory to me...

Could you please elaborate your question a little more?
 
I am driving a baseband IQ modulator from a demodulator and after the loop is stable, I want to lock the IQ values feeding the modulator. I am feeding the modulator with 0 to 1V. until I get a FPGA going I would like to use a Teency.
 
I now have a t3.5, I would like to pass the audio from A0 as fast as possible to the audio output pin A22. similar code worked for the T3.2. what am I missing?



//I AUDIO INPUT A0
//I AUDIO OUTPUT A22
//Q AUDIO INPUT A1
//Q AUDIO OUTPUT A21
int IinputPin = A0; // select the input pin for the potentiometer
int IValue = 0; // variable to store the value coming from the sensor
int QValue = 0;
void setup()
{
analogWriteResolution(12);
analogReadResolution(12);
}

void loop() {
IValue = analogRead(IinputPin);
analogWrite(A22, IValue);
}
 
I'm running it on a Teensy 3.5 here, with a function generator connected to pin 14/A0 and my scope watching DAC1/A22. Seem to work fine.

file.png

what am I missing?

Maybe something simple, like wires connected to the wrong pin?
 
Hmmmm it seems to work now, I pasted the code from here pack into a sketch, loaded and it works. well, at least I wasn't doing something stupid. Thanks.
P
 
By using the ADC (or even both ADCs interleaving) and the DAC with DMA and optimized code, you can go up to 400kHz without overclocking. Overclocking requires modifying the clock/PLL/FLL configuration registers at startup. This would have to be done by modifying the Teensyduino core files.

In ever case, reading the ADC and rewriting the result in loop() is the slowest way to do things.
 
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