24 bit audio using ICS-4342

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Hello!

I am trying to get four ICS-43432 I2S microphone to work with a teensy 3.6 board, using the i2s_quad function.

I understand that the audio library works with 24 bit I2S devices by throwing away 16 of the 32 bits which make up the communication, reducing the resolution to ensure compatibility with the existing libraries.

With the ICS-43432 microphone, the data starts at second rather than the first clock pulse, and so my question is how does the library know which 16 of the 32 bits to throw away? Other I2S microphones start their communication on the first bit.

I know people have used the ICS-43432 microphone successfully from other threads, but I couldn't find any mention of people dealing with this issue.

I am quite new to all this, so sorry if it is a stupid question!

James
 
Hello!

I am trying to get four ICS-43432 I2S microphone to work with a teensy 3.6 board, using the i2s_quad function.

I understand that the audio library works with 24 bit I2S devices by throwing away 16 of the 32 bits which make up the communication, reducing the resolution to ensure compatibility with the existing libraries.

With the ICS-43432 microphone, the data starts at second rather than the first clock pulse, and so my question is how does the library know which 16 of the 32 bits to throw away? Other I2S microphones start their communication on the first bit.

SW does not know.
Also, AFAIK, the quad version is not adapted yet to the 64 bit Bits/Frame ratio.
If you need the quad for 24/32 bit I2S , you may need to adapt the stock code.
best is to write own I2S-quad driver.
If you care about rest of Audio library, you can introduce a programmable 16-bit extraction (aka digital gain)
 
I have made some changes to the quad library and it seems to now work with 64 bits, but that was using another microphone where the MSB is on the first clock pulse

Is it possible to change the code so that the 16 bit window is offset by a bit? I could not find an obvious way to do this. Any help would be greatly appreciated!

James
 
I have made some changes to the quad library and it seems to now work with 64 bits, but that was using another microphone where the MSB is on the first clock pulse

Is it possible to change the code so that the 16 bit window is offset by a bit? I could not find an obvious way to do this. Any help would be greatly appreciated!

James
What I did was simply to acquire 32 bits in the DMA, and in the update function extract only the bits I wanted to be used by the audio-library
 
Hello!
With the ICS-43432 microphone, the data starts at second rather than the first clock pulse, and so my question is how does the library know which 16 of the 32 bits to throw away? Other I2S microphones start their communication on the first bit.

I know people have used the ICS-43432 microphone successfully from other threads, but I couldn't find any mention of people dealing with this issue.
Having the data start one clock cycle later than Frame Sync assertion is the standard I2S format (other formats are known by various names such as Left Justified, Right Justified, and PCM A/B). The Audio Library’s I2S classes configure the hardware for standard I2S format. I’ve successfully used the ICS43432 microphone with the regular (non-quad) AudioInputI2S class. You should try that first.

A while ago I also modified the standard Quad I2S classes to use the 64-bit format for a project. It’s described in this post: https://forum.pjrc.com/threads/45394-SPDIF-Input-and-Output. Unfortunately, I didn’t get around to producing a Quad I2S Master class with input capability since the device I was working with didn’t support that mode. But, you can take a look at the code for 64-bit Quad Slave (input and output) and 64-bit Quad Master (output only) and modify to your needs.
 
Thanks! I managed to rewrite the quad I2S classes for 64 bit. It seems to work fine, at least for recording sound from the 4 channels.
 
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