Output Teensy 3.6 16MHz xtal clock

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Kjhales99

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I would like to get a low jitter clock from Teensy 3.6 to drive an external ADC. Immediate need is for a clock of 2MHz, and the Teensy's 16MHz crystal (or a divided version) would work well.
I do NOT want a clock generated by an on-chip PLL or FLL, unless such has a (low) documented amount of jitter.

I've been Reading the 2200 pages of The Fine Manual, and I'm still not sure how to do this.

Time will probably reveal an answer, but I hope someone has done this before.

Goal is to run a ADS1271 at approx. 4K samples per second (exact rate somewhat flexible).
 
I would like to get a low jitter clock from Teensy 3.6 to drive an external ADC. Immediate need is for a clock of 2MHz, and the Teensy's 16MHz crystal (or a divided version) would work well.
I do NOT want a clock generated by an on-chip PLL or FLL, unless such has a (low) documented amount of jitter.

I've been Reading the 2200 pages of The Fine Manual, and I'm still not sure how to do this.

Time will probably reveal an answer, but I hope someone has done this before.

Goal is to run a ADS1271 at approx. 4K samples per second (exact rate somewhat flexible).

maybe this could help (see Paul's comment on PLL)
Also if you keep MULT to be 1 or 2 and only vary DIV you get lowest jitter possible (there was another thread about this)
 
Try this and look for the 16 MHz clock on pin 9.

Code:
void setup() {
  SIM_SOPT2 = (SIM_SOPT2 & ~0xE0) | 0xC0;
  OSC0_CR |= 0x80;
  CORE_PIN9_CONFIG = PORT_PCR_MUX(5); // PTC3
}

void loop() {
}
 
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