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Thread: How does _disable_irq() interact with FTM and pin change during disable period?

  1. #1
    Junior Member
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    May 2017
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    How does _disable_irq() interact with FTM and pin change during disable period?

    I have an ADC that sends a rising edge when data is ready. I am currently reading this edge asynchronously using an ISR triggered DMA, which further triggers a new reading once the data has been read. In the main loop, I copy a counter from the ISR to keep track of the number of readings.

    If I get a new interrupt while _disable_interrupt, does Teensy keep track of that when I enable interrupt again? If not, is reading the pin level the best option (whether it is now high)?

    I also have a FTM timer that is counting external pulses and want that to be going during __disable_irq. How do they interact?

    If you can point me to the right location on the datasheet, then I know where to look in the future! Thanks.

  2. #2
    Senior Member PaulStoffregen's Avatar
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    Nov 2012
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    18,502
    Short answer: yes, the hardware as a 1-bit flag which remembers the interrupt condition happened. When you later re-enable interrupts, your interrupt function will run.

    The long answer is quite a bit more complicated. Much of the info is really only explained in Yiu's Definitive Guide book. I put links to the book on this page:

    https://www.pjrc.com/teensy/datasheets.html

    There's actually a second interrupt "pending" bit within the ARM core. Usually the practical effect is it works together with the bit in the peripheral. Most of the peripherals require you to clear their interrupt bit. The attachInterrupt code does that for you, before calling your function. Likewise for IntervalTimer. But if you access the hardware directly, that's a detail to consider. The pending bits in the ARM core clear automatically when the processor starts running your interrupt code.

    The interrupts also have a nested priority feature. Priorities range from 0 to 255, where lower numbers mean high priority. When an interrupt is running, all others at the same and lower priority (higher numerical values) are blocked. But higher priority interrupts can still interrupt your interrupt code. By carefully arranging the priorities, you can achieve great results. Teensyduino comes with a pretty good set of defaults, where most interrupts default to 128 (right in the middle of the range).

    While it's not often used, the ARM core also has a way to disable by priority level, rather than masking all interrupts. Again, full details are explained in Yiu's book.

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