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Thread: Tech Specs: Bandwidth?

  1. #1

    Tech Specs: Bandwidth?

    In the tech specs, what does Bandwidth mean, exactly?

    Is it just Bus Clock (words/sec) * 4 (bytes/word) ? If so, is the 192 MB/s value for T3.5 correct?

    From kinetis.h
    #elif (F_CPU == 120000000)
     #define F_PLL 120000000
     #ifndef F_BUS
     #define F_BUS 60000000
     //#define F_BUS 120000000
     #define F_MEM 24000000
    So, should the value be 240 MB/s ?

  2. #2
    Well, I just discovered that there are links in that tech spec table! When I click on Bandwidth, I get:

    Flash Memory Bandwidth

    Individual Flash memory cells are limited by silicon technology to approximately 20-30 MHz access rates.
    To support faster software execution from Flash memory, a "row" of flash memory bits is accessed simultaneously to increase the total bandwidth.

    Older & slower chips lock the processor and flash memory clocks in sync. Newer & faster chips allow them to be configured separately. Even when the processor runs faster (overclocked), the flash memory bandwidth remains fixed.
    So the question now becomes: How does that value relate to F_MEM in kinetis.h ? There's a factor of 8 between the table value and F_MEM for T3.5 @ 120 MHz, so presumably there are 8 bytes per row of flash in that chip.

    But where does the 411 MB/s value come from for T3.6 ? Look at kinetis.h again:
    #elif (F_CPU == 180000000)
     #define F_PLL 180000000
     #ifndef F_BUS
     #define F_BUS 60000000
     //#define F_BUS 90000000
     #define F_MEM 25714286
    If there are 16 bytes per flash row in that chip, it works out to 411 MB/s.
    Last edited by Citabria; 11-14-2018 at 06:52 PM. Reason: answered my own questions

  3. #3
    Senior Member
    Join Date
    Mar 2015
    Your original question is interesting. I wondered if the value for T3.5 is an error (I expected it to be similar to T3.6).

    I looked here to seek performance data for T3.6. And here for T3.5. They look very similar.

    I'm not sure what value there is in knowing this parameter. If "Flash Memory Bandwidth" means "How fast can bytes be read from flash in operation..." then I would have thought the pipelining method of pre-fetching instructions (and other factors) will blur the practical significance.

  4. #4
    Yes, so many factors can affect performance. But it appears from kinetis.h that Paul has made some choices based on experience, or testing, or manufacturer specs. Apparently, F_MEM must be an integer divisor of F_CPU. Some of the overclocked settings show F_MEM as high as 32000000. So why not choose a divisor of 6 for T3.6 @ 180 MHz, giving F_MEM of 30000000 and a bandwidth of 480 MB/s? Because the document you linked says the flash clock is spec'd at 28 MHz. So Paul has made the prudent choices, but still allows us overclocking if we want to risk it.

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