Recommended size for Pogo pin pads and holes? (more generic question).
Not sure if correct, but if P50-J1 Pogo-Pins, I assume 0.9mm drills for the pins (?)
All other 0.96mm? (taken from an older Eagle-lib)
Recommended size for Pogo pin pads and holes? (more generic question).
Should have asked earlier - was laying out against my breakout board and things looked shifted against the 1052 layout. Know this is funny but can you tell me the coordinates of the Vin pin - looks like the width is going to wind up narrower. Know I saw it somewhere - 0.7 between edge pins?Those coordinates are for the (planned) final locations on the 1062 board.
Thanks Paul.
I should also emphasize, while unlikely at this point, those coordinates could still change. The PCB layout is not yet finalized.
can you tell me the coordinates of the Vin pin
I put together a crude schematic and was wondering if someone could give me a sanity check
Pin 24: x=1182, y=550
Pin 25, x=1018, y=550
Pin 26: x=1182, y=450
Pin 27, x=1018, y=450
Pin 28: x=1182, y=350
Pin 29, x=1018, y=350
Pin 30: x=1182, y=250
Pin 31, x=1018, y=250
Pin 32: x=1182, y=150
Pin 33, x=1018, y=150
...
Not sure if we'll do a similar breakout board for the 1062 boards. By that point, we'll be pretty close to release and I'll probably be focused again almost entirely on the software side, so a fancy breakout board for the 1062 boards seems unlikely.
If instead you wish to use surface mount connector like: https://www.digikey.com/product-detail/en/samtec-inc/TSM-105-01-S-DV-TR/SAM14832CT-ND/9595124
The x Positions would probably be 1018 -> 1050 and the 1182 -> 1150 I think?
That is they are in line with Pin 9 and Pin 10 (A2 A1)
Paul- if the SD pads work out as mapped on T4 - is the T4 planned to ship with SD socket in place?
Nope. And to be honest, fitting a SD socket onto the bottom side is awkward at best. I wish I could have allocated more room, but there's only so much I can accomplish on this small board.
Those pads are indeed designed for that sort of J-lead style header. That's the reason why they're centered at 1018 & 1182. The J bend shape needs long pads that are located beyond the 0.1 inch spacing of the header's rows.
Believe me, I would have loved to use smaller pads (like were on the 1052 betas)... the larger ones on the final board create large no-via zones that make the PCB routing difficult. But not nearly so hard as the BGA escape routing.
I can imagine. So I updated my Diptrace file to setup for the J pins.
Can a SD socket be mounted at all below the board?
if yes, OK.
if not, maybe think about a 1 mm spacing (instead of 1.1 mm microSD spacing) as there are 1mm connectors around (I adapted one for T4 beta by bending the pins).
@mjs513 > That is good news! If that had avoided efforts to come online it would have been bad.
000 ALT0 — Select mux mode: ALT0 mux port: USDHC1_[COLOR="#B22222"]CMD [/COLOR]of instance: usdhc1
001 ALT1 — Select mux mode: ALT1 mux port: FLEXPWM1_PWM0_A of instance: flexpwm1
010 ALT2 — Select mux mode: ALT2 mux port: LPI2C3_SCL of instance: lpi2c3
011 ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT04 of instance: xbar1
100 ALT4 — Select mux mode: ALT4 mux port: LPSPI1_SCK of instance: lpspi1
101 ALT5 — Select mux mode: ALT5 mux port: GPIO3_IO12 of instance: gpio3
110 ALT6 — Select mux mode: ALT6 mux port: FLEXSPI_A_SS1_B of instance: flexspi
000 ALT0 — Select mux mode: ALT0 mux port: USDHC1_[COLOR="#B22222"]CLK[/COLOR] of instance: usdhc1
001 ALT1 — Select mux mode: ALT1 mux port: FLEXPWM1_PWM0_B of instance: flexpwm1
010 ALT2 — Select mux mode: ALT2 mux port: LPI2C3_SDA of instance: lpi2c3
011 ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT05 of instance: xbar1
100 ALT4 — Select mux mode: ALT4 mux port: LPSPI1_PCS0 of instance: lpspi1
101 ALT5 — Select mux mode: ALT5 mux port: GPIO3_IO13 of instance: gpio3
110 ALT6 — Select mux mode: ALT6 mux port: FLEXSPI_B_SS1_B of instance: flexspi
000 ALT0 — Select mux mode: ALT0 mux port: USDHC1_[COLOR="#B22222"]DATA0[/COLOR] of instance: usdhc1
001 ALT1 — Select mux mode: ALT1 mux port: FLEXPWM1_PWM1_A of instance: flexpwm1
010 ALT2 — Select mux mode: ALT2 mux port: LPUART8_CTS_B of instance: lpuart8
011 ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT06 of instance: xbar1
100 ALT4 — Select mux mode: ALT4 mux port: LPSPI1_SDO of instance: lpspi1
101 ALT5 — Select mux mode: ALT5 mux port: GPIO3_IO14 of instance: gpio3
000 ALT0 — Select mux mode: ALT0 mux port: USDHC1_[COLOR="#B22222"]DATA1[/COLOR] of instance: usdhc1
001 ALT1 — Select mux mode: ALT1 mux port: FLEXPWM1_PWM1_B of instance: flexpwm1
010 ALT2 — Select mux mode: ALT2 mux port: LPUART8_RTS_B of instance: lpuart8
011 ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT07 of instance: xbar1
100 ALT4 — Select mux mode: ALT4 mux port: LPSPI1_SDI of instance: lpspi1
101 ALT5 — Select mux mode: ALT5 mux port: GPIO3_IO15 of instance: gpio3
000 ALT0 — Select mux mode: ALT0 mux port: USDHC1_[COLOR="#B22222"]DATA2[/COLOR] of instance: usdhc1
001 ALT1 — Select mux mode: ALT1 mux port: FLEXPWM1_PWM2_A of instance: flexpwm1
010 ALT2 — Select mux mode: ALT2 mux port: LPUART8_TXD of instance: lpuart8
011 ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT08 of instance: xbar1
100 ALT4 — Select mux mode: ALT4 mux port: FLEXSPI_B_SS0_B of instance: flexspi
101 ALT5 — Select mux mode: ALT5 mux port: GPIO3_IO16 of instance: gpio3
110 ALT6 — Select mux mode: ALT6 mux port: CCM_CLKO1 of instance: ccm
000 ALT0 — Select mux mode: ALT0 mux port: USDHC1_[COLOR="#B22222"]DATA3[/COLOR] of instance: usdhc1
001 ALT1 — Select mux mode: ALT1 mux port: FLEXPWM1_PWM2_B of instance: flexpwm1
010 ALT2 — Select mux mode: ALT2 mux port: LPUART8_RXD of instance: lpuart8
011 ALT3 — Select mux mode: ALT3 mux port: XBAR_INOUT09 of instance: xbar1
100 ALT4 — Select mux mode: ALT4 mux port: FLEXSPI_B_DQS of instance: flexspi
101 ALT5 — Select mux mode: ALT5 mux port: GPIO3_IO17 of instance: gpio3
110 ALT6 — Select mux mode: ALT6 mux port: CCM_CLKO2 of instance: ccm
To maybe answer my own question about SDIO pins? I am assuming you are using SDHC1 pins?
Sounds great, totally understand they are not finalized yet, also probably awhile before I see one...Yes, confirmed, the bottom side pads (which are on the 1052 boards in reverse order) are indeed GPIO_SD_B0_00 to GPIO_SD_B0_05.
Just a quick reminder, those coordinates are not 100% finalized. I ordered another small size SD socket that looks more promising for a better fit. If it works better, I might move things around slightly before the final board rev.
When you issue the new 1060 boards are you planning are retaining support for the 1052 board?
I've committed a fix for the crash on Teensy 3.6 when the power ramps too slowly.
https://github.com/PaulStoffregen/cores/commit/1b1f95315f6de10e03c3acc64ba9dd9e14a0daf0
Any chance you could give this a try on your Teensy 3.6 with the MIC803 chip disconnected from the reset pin?
re T4: should i try with the PMIC_ON_REQ hardware modification (as per #1910)? sounds simple enough, just not entirely sure what value that 0402 resistor should be.
Sure, give it a try. Just make sure you populate only 1 of those 402 resistors at a time.
Pretty much any resistor value should work, since the input impedance of the regulator is very high. The input leakage current spec in TI's datasheet is an incredibly low 10 nA. But I'd recommend using no higher than 10K. On some of the boards we used 0 ohms, on other 22 ohms. 220 ohms should be perfectly fine.
I still haven't decided how I want to handle the pullup resistor. Startup sequencing is even better with no resistor at all. But then you can lose power in certain scenarios when PMIC_ON_REQ goes high impedance. NXP's documentation on PMIC_ON_REQ leaves a lot to be desired (or figured out by experimentation & guesswork). I put some extra test points on a couple of the boards on the next prototype.
If you do the mod, I'd recommend a 1M resistor between PMIC_ON_REQ and the always-on power test point (the one closest to pin 12).
- What is the disadvantage of using the USB host without the TPS2055A? (connecting power to USB#0)
- Are there solderpads for the flash quadspi -signals on the new beta-board (+additional cs) ? (sorry for asking this again.. I think I missed your answer ;-)