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Thread: Help me with 3.3 to 5V Logic level up shifter for TTL LCD serial signals.

  1. #1

    Help me with 3.3 to 5V Logic level up shifter for TTL LCD serial signals.

    If this is not in the correct forum, please excuse my ignorance. If not, then please read further.

    I have purchased a few NewHaven Display 4 x 20 LCD's that are I2C, SPI & TTL serial capable.
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    I will eventually use a Teensy 3.2 to communicate using the Serial method to the LCD.

    My problem... I found out after the fact that the TTL levels do not meet the 3.3v output levels. In the electrical specifications for the LCD below, you can see the voltage levels are NG (0.70 * VDD of 5.0v) = 3.5v
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    So, the only option is to make a logic level up shifter, but, there are so many options to choose from. Note that my limitation is that I have is that I do NOT have a 3.3v source, only 5 Volts from the external LM7805. Why no 3.3v? The Teensy 3.2 onboard regulator is being used to power an Nrf wireless module. This is where I need help.

    From a hardware aspect, I can use a simple schematic below...
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    with 5v tolerant pins on the Teensy 3.2 being a benefit, but I don't think that the circuit will work when pulling logic low. Will it get me close to Vss or 0.6v?

    Another alternative is to use a SN7407...
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    and last is using FETs which will require 2, 3.3v + 5v and inverse the logic which will require two. This option I do not care for because there's allot of traces and thru hole mounting.

    So, I would like to ask the group... could schematic 1 work? opinions of schematic 2, and trying my best to stay away from the FET option. What other simple schematics, transistors options could I use that would give me ...
    1. The non inverse logic problem
    2. will work with 5v only
    3. has less 9 holes to mount.

    Can you please share schematics that can work other than what I have given.


  2. #2
    Senior Member+ Frank B's Avatar
    Join Date
    Apr 2014
    Germany NRW
    hm. Hi-level is 0.7*vdd - if you reduce the display-voltage to 4.5v, which seems to be allowed, maybe it works without levelshifters.worth a try.
    0.7 * 4.5 = 3.15 v

  3. #3
    Senior Member+ Theremingenieur's Avatar
    Join Date
    Feb 2014
    Colmar, France
    Most performant and universal solution: 74HCT125

  4. #4
    Senior Member PaulStoffregen's Avatar
    Join Date
    Nov 2012
    Agreed, use a HCT or AHCT chip for SPI or serial. Diodes and open collector circuit are slow due to the weak pullup resistors.

    But if you use I2S, those level shifters with 1 mosfet and 2 resistors work well. Adafruit, Sparkfun, Seeed and others over the years have written overly optimistic "good for all level shifting needs" advice on those mosfet circuit. Truth is they're terrible for higher speeds. Only use those for I2C.

  5. #5
    Paul, All,
    Thanks for the advice. The diode and open collector circuits being slow... what about at 9600 baud. Thats 960 bytes/sec which seems fast but its turtle slow compared to 115200 and MIGHT keep up but not sure at this point. I could improve the first curcuit with 0.20v low loss schottky diodes and also might raise the logic level voltage which will also be a +.

    As for the 74HCT125, I really don't need 4 channels, just only one and it will also take up more space on the PCB.

    Last, I didnt hear other than from Paul about the first schematic. So, I believe I will protoboard this circuit and give it a go.

    I will continue to hang out here for better options. The IC would be really nice as long as its single / dual channel and has around 8 pins.


  6. #6
    After checking the circuit below
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    It looks like a BAT43 schottky diode is required to achieve a Logic Low of 0.50V and a Logic High of 3.8V. Timing is Ok with a 5ns recovery time.

    That is the forward voltage being 0.45V @ 15mA. So, for those that want a simple circuit to raise voltage, Keep in mind that you will need a "fast switching" diode with a V fwd range of 0.30 to 0.50 in order to reach an acceptable logic low of 0.6v... but also keep in mind the lower the logic low, the lower the logic high. So, theres a balance.


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