Left and Right Channels not in Sync ?

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ossi

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The program given below shows a behaviour that I don't understand. The Intention is as follows: Data from Left and Right channel ADCs in SGTL5000 is directly copied to the Left and Right DACs in SGTL5000 and also to the CPUs DACs. The left channel gets a cosine signal from a signal generator, the right channel gets a sine signal. The output shown on a x-y oszilloskope display should be a circle (Lissajous figure). Sometimes it is a circle, sometime an ellipse . Sometimes it changes when I restart the sketch. The behavior can be explained when the left and right blocks supplied from the SGTL5000 are sometimes not in sync.

So the question is: How must I setup the system such that the blocks of the left and right Channels are in sync?

Here is the code:

Code:
#include <Audio.h>
#include <Wire.h>
#include <SPI.h>
#include <SD.h>
#include <SerialFlash.h>



// GUItool: begin automatically generated code
AudioInputI2S            i2s2;           //xy=256,199
AudioPlayQueue           playQueue1;     //xy=426,281
AudioPlayQueue           playQueue2;     //xy=427,331
AudioRecordQueue         recordQueue2;    //xy=429,237
AudioRecordQueue         recordQueue1;         //xy=430,178
AudioOutputI2S           i2s1;           //xy=624,272
AudioOutputAnalogStereo  dacs1;          //xy=624,327
AudioConnection          patchCord1(i2s2, 0, recordQueue1, 0);
AudioConnection          patchCord2(i2s2, 1, recordQueue2, 0);
AudioConnection          patchCord3(playQueue1, 0, dacs1, 0);
AudioConnection          patchCord4(playQueue1, 0, i2s1, 0);
AudioConnection          patchCord5(playQueue2, 0, dacs1, 1);
AudioConnection          patchCord6(playQueue2, 0, i2s1, 1);
AudioControlSGTL5000     sgtl5000_1;     //xy=261,101
// GUItool: end automatically generated code



void setup() {

  analogReadResolution(12);  
  Serial.begin(115200);  
  Serial.print("Hello World\n"); 
  dacs1.analogReference(1) ;

  sgtl5000_1.enable();
  sgtl5000_1.volume(0.9);
  sgtl5000_1.lineInLevel(8,8);
   
  AudioMemory(64); 
  recordQueue1.begin();
  recordQueue2.begin();
  }


float FloatBuffer1_L[128] ;
float FloatBuffer1_R[128] ;


float scale ;

void getBlocks(float *L_buffer, float *R_buffer){
  int16_t *fromI2Sbuf_L ;  
  int16_t *fromI2Sbuf_R ;
  fromI2Sbuf_L = recordQueue1.readBuffer();
  fromI2Sbuf_R = recordQueue2.readBuffer();
  for(int k=0 ; k<128 ; k++){ L_buffer[k]=fromI2Sbuf_L[k]*scale ; }
  for(int k=0 ; k<128 ; k++){ R_buffer[k]=fromI2Sbuf_R[k]*scale ; }
  recordQueue1.freeBuffer();
  recordQueue2.freeBuffer();
  }

void putBlocks(float *L_buffer, float *R_buffer){
  int16_t *toI2Sbuf1 ;  
  int16_t *toI2Sbuf2 ;  
  toI2Sbuf1 = playQueue1.getBuffer();
  toI2Sbuf2 = playQueue2.getBuffer();
  for(int k=0 ; k<128 ; k++){ 
     toI2Sbuf1[k]=L_buffer[k] ; 
     toI2Sbuf2[k]=R_buffer[k] ; 
     } 
  playQueue1.playBuffer();
  playQueue2.playBuffer();
  } 


void loop() {
   if ((recordQueue1.available()  > 4) &(recordQueue2.available()  > 4)  ) {
      scale=exp( (analogRead(A12)-2048.0)/256.0) ;
      getBlocks(FloatBuffer1_L,FloatBuffer1_R) ;
      putBlocks(FloatBuffer1_L,FloatBuffer1_R) ;
      } 
   }
 
Hi Martin,

not sure if this is the same problem (that we have called "twin peak problem", because in an SDR spectrum display you see twin peaks from one carrier), but you could have a look here:

https://forum.pjrc.com/threads/4233...-in-realtime-processing?highlight=codec+reset

It seems several audio codecs are experiencing a bug so that they do not reliably use the same order of samples in every use case.

This applies to the SGTL5000, but also the WM8731.

So, to answer your question: I do not think it is possible to setup the audio board and Teensy so that you can be sure that I & Q are exactly 90 degrees apart.
 
So, to answer your question: I do not think it is possible to setup the audio board and Teensy so that you can be sure that I & Q are exactly 90 degrees apart.

That would mean that all stereo applications (as well as SDR applications) suffer from this erratic behaviour ?
 
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