Reading a 1Mhz -15V to Gnd clock

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Perhaps you have. How about using an AC coupled circuit with clamping diodes and an emitter follower, like below? You can fiddle with the values to get a good waveform. I use LTSpice for a quick check. Haven't fine tuned it.

NPN-Level Shifter.jpg
 
That circuit has a AC coupled input. It should work great for a repetitive signal like a clock, where the time high and low are equal. For a data signal, maybe not so ideal.
 
Ah yes, i see your point. I have +/- 15v rails (close enough) inside the organ.

Assuming i can’t go over 1k impedence for the 1mhz clock signal before it messes with the waveform shape, can i simply pass the 15v rail through a 1k resistor to the clock (after its 1k resistor) to offset the voltage? Using ohms law it says 15ma @ almost 1/4w, the power supply uses two 15v 1A voltage regulator (1 per +/- 15v rail).

I’m fairly new to electronics theory, does the voltage divider draw the current or is that dependent on what the voltage divider drives? For example a hex buffer?

Thanks!
 
If i can just get the -15v to gnd digital signal to +15v gnd, i believe i can just use a CD4050 hex buffer to do the level shifting to 3.3v. The data sheet says the inputs can be up to 15v l, even when the supply voltage is lower, an the minimum for the supply voltage is 3v.
 
Here's an idea to try (yes, I made this up just now...) It's only 3 parts, and has a pretty good chance of maybe working.

levelshift.jpg

If the logic low output doesn't go all the way to GND, or goes slightly negative, adjust the 2.2K resistor slightly.

Recommend using 1% tolerance resistors, if available.
 
One caveat of this circuit is the NPN transistor could be damaged if the input is ever driven positive by more than a few volts. If that could be a possibility, you should add a 1N4148 diode to protect the transistor.

levelshift2.jpg
 
Thanks Paul! I actually had run out and grabbed a bunch 2n3904’s and 2n3906’s before i read this, serendipity, and have a ton of 4148’s. No chance of it going positive, but i’ll incorporate the diode all the same.

Just cause i’m curious how things work, and because i’ve never seen a npn wired in this way, does a negative voltage at the emitter cause a short to gnd from the collector to the base? Or they act as a diode biased to ground?

If t works thats certianly a neat trick with few parts! I only know of using npns with a voltage/current at its base.

Cheers!
 
I tried it here. The circuit definitely does work. I can't say why you blew up a part, but I can say with confidence the reason wasn't this circuit. Maybe you connected something wrong?

Here it is wired up on my workbench.

DSC_0470_web.jpg

I used my Siglent function generator for the input. It has a -10V maximum range, so I used -10V instead of -15V. Here are the settings used:

DSC_0471_web.jpg

To compensate for only -10V, I changed to 2.2K resistor to 3.3K. Here's a close-up of the circuit.

DSC_0472_web.jpg

To verify, I used my oscilloscope, as you can guess from the scope probes in the first photo. Here's the results I see.

file.png

It's definitely working as intended, converting the -10V to 0 signal into a 0 to 3.3V signal. Looks like the output signal is going ever so slightly below ground. That's easy to fix by just lowering the 3.3K resistor slightly.

Again, I can't say why you blew up a chip, or what that chip was even doing in this circuit needing only 1 transistor and 2 resistors. I can't see what you actually did. But now you can see what I did here. It does indeed work when wired up properly. Hopefully these photos help?
 
Just realized I had the function gen set to 1kHz. Before putting this away, I reached over and set it to 1 MHz to look at whether this circuit works at higher speed.

Here's the 1 MHz waveforms my scope sees. You can see in this screen capture the scope's time base is 500 ns per division, rather than 500 us as the first one.

file2.png

Looks like 1 MHz is about the upper range for this 3 component circuit.

Also looks like my poor Siglent SDG5082 struggles a bit to output a full 10V square wave at such high frequency....
 
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For one more quick test, I replaced the resistors with 1K and 330 ohms. Indeed it's able to handle the speed much better with lower impedance.

file3.png

But of course this loads the -10V signal with ~1K, meaning it has to drive 10 mA. Apparently my Siglent function generator can do that pretty well.
 
...If the logic low output doesn't go all the way to GND, or goes slightly negative, adjust the 2.2K resistor slightly.

Recommend using 1% tolerance resistors, if available.

Before you connect a CD4050, try to see if there is a negative dc level in your output. My data sheet says not to go below 0.5V input. As Paul mentioned its possible to shift the dc point via resistor changes. Hence recommending tighter resistor values.

That's one reason I suggested an ac coupled circuit. But as Paul noted the modulated signal (data) can shift the dc average depending how low the effective data frequencies go. Changing the coupling capacitor may improve for some given ranges of data frequencies. In your case, my circuit could work for the data range you get from your keyboard. I guess you didn't try it? I don't know what a typical data signal you actually get, so its hard to know what won't work.

PeterB
 
Before you connect a CD4050, try to see if there is a negative dc level in your output. My data sheet says not to go below 0.5V input. As Paul mentioned its possible to shift the dc point via resistor changes. Hence recommending tighter resistor values.

That's one reason I suggested an ac coupled circuit. But as Paul noted the modulated signal (data) can shift the dc average depending how low the effective data frequencies go. Changing the coupling capacitor may improve for some given ranges of data frequencies. In your case, my circuit could work for the data range you get from your keyboard. I guess you didn't try it? I don't know what a typical data signal you actually get, so its hard to know what won't work.

PeterB

Hi Peter, i did try but didn’t get any results. I’ve discovered the wonders of circuit simulation via the sesame street version of spice (everycircuit), so i’m gonna build your circuit in there and play with it so i can understand better how its working.

AC coupling maybe be a good solution for the 1mhz clock, there is a also a 54us sync signal though (lasting 1us pulse) and the other 4 data lines are modulated based on the data (within the 54us sync cycle).

Interstingly, a 100nf cap followed by a 1n4148 reversed biased to ground produced a 15v to gnd clock, without the diode it cycles between +/- 7.5v, i thought the diode would then produce a 7.5v to -.7v signal.
 
For one more quick test, I replaced the resistors with 1K and 330 ohms. Indeed it's able to handle the speed much better with lower impedance.

View attachment 16691

But of course this loads the -10V signal with ~1K, meaning it has to drive 10 mA. Apparently my Siglent function generator can do that pretty well.

I emulated the circuit in everycircuit app, understand now what it is doing. Not sure what killed the chip but it could have been a short on the wires, or maybe my cheap 3.3v breadboard power supply switching on. I rebuilt it and it kinda works, though i’m seeing the effects of a weak loading signal. I think i’m gonna have to buffer all the signals with another 4050BP chip. Using a 1k resistor at the input and a 390ohm to the 3.3v power supply i got close, but the signal goes negative by about -1v, and it works different based on different data lines, for example the clock behaves kinda wellbut the 54us sync signal does not. Heres just the 1mhz clock; top is after the transistor circuit bottom is original clock.

https://ibb.co/T8dfGsQ
 
If the signal is too weak to drive the 10K (or 1K) resistor, you could probably solve that by adding a PNP transistor. Connect its emitter to the resistor, it's collector to -15V power, and its base to the weak signal.

If the output signal is going negative for logic low, that's a sure sign you've used pullup resistor on the output which is too high. Reduce the resistor value until you get close to 0 volts for logic low.

Also, remember the combination of 10K and 3.3K, or 1K and 330 ohms, were for a -10V input signal to 3.3V output signal. My function generator max is +/- 10V. Much as I'd like to help you, building even more stuff to amplify the signal just wasn't within the time I can spend merely to help you get past believing the circuit doesn't work only because some unknown mistake caused a chip to burn up. So I used -10V rather than -15V, and adjusted the resistors accordingly.

For your -15V signal, you'll need a ratio of 10K to 2.2K (as I originally suggested in msg #31), or 1K to 220. Using 1K on the input with a 390 ohm pullup is straying pretty far from the correct ratio. Remember this: if you see negative voltage for logic low, that means you need to reduce the value of the output's pullup resistor. Increasing the output resistor will only make negative voltage output worse.
 
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I emulated the circuit in everycircuit app, understand now what it is doing.
I'd be interest to see a 'scope shot of a data stream including your sync. Apparently LTSpice has a way of using a data file to stimulate the circuit so one can see what the output would be with such a signal. Could you get me some samples of data?

PeterB
 
I'd be interest to see a 'scope shot of a data stream including your sync. Apparently LTSpice has a way of using a data file to stimulate the circuit so one can see what the output would be with such a signal. Could you get me some samples of data?

PeterB

Yeah i can take screen capture today, though it will only be two channels, 54us sync + 1 (of 4) data line. I just have a two-channel 20mhz usb scope.
 
Thanks for the advice, paul. I will experiment with the values you suggested. If i buffer with a PNP, perhaps i’ll use a 4050 to clean up the way the data lines come out of the npn. Even the instruments own data lines are a bit funny looking coming out of the CMOS keyboard assigner until they are buffered by the 4050.

Would a nPn FET be more appropriate vs a 2n3904? That little dip at the end of the switch seems to be an effect known to bnj transistors called “tailing effect”. Everycircuit only has a mosfet, which are too slow, but the circuit seems to work on the same principal;

https://www.quora.com/Why-is-the-BJT-switch-slower-than-the-FET-switch

Note in this example i’m powering from +15v supply voltage with a voltage divider to bring it down to 3.3v’s. If this works i might simply skip the voltage divider, and use the 4050 supply voltage tied to 3.3v (it has 6 buffers onboard) and can be driven by a +15v signal.

7B4B3A8E-12EB-422B-A0D5-8CF578071134.jpeg745D4717-1004-4A5A-AC6A-6DB1877ED0D6.jpeg
 

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Which USB scope?

A few times we've seen people on this forum trying to use Hantek products which claim 20 MHz bandwidth, but actually only sample 2 inputs at 500 kHz. If you have a Hantek or similar product, check what sample rate it's actually using. Obviously 500 kHz sampling won't be good enough to view 1 MHz or 1 Mbit/sec waveforms, not matter what bandwidth is claimed.
 
Yeah its definetley rated for 20mhz, its the 6022BE.

Damn this -15v logic, i see why they did it, to isolate the analog and digital components, but it surely makes it more complicated. If, for example, you had +15v logic, you could isolate the control signal (say in this case the clock), from the current path of the 3.3v supply when the circuit when the logic is low.

With the negative logic, the current from the 3.3v source has to flow backwards through the -15v low logic signal, which means going backwards into CMOS outputs.

I tried adding another pnp transitor at the emitter of the npn, to try and provide an alternate path to the -15v supply line, it took at little heat of the other path, but not entirely. Wish i could isolate it all together, but that will def complicate the circuitry required.
 
I'd be interest to see a 'scope shot of a data stream including your sync. Apparently LTSpice has a way of using a data file to stimulate the circuit so one can see what the output would be with such a signal. Could you get me some samples of data?

PeterB

Attaching screenshot showing 54us sync signal + dataline 2 (of 4). I found triggering to the sync signal was where you can really see whats happening.

View attachment sync + dataline 2.pdf
 
I copied the schematic in the 4050BP datasheet to emulate 1 of it’s channels in conjunction with Your circuit, Paul. It certainly helped visualise everything. A npn FET seemed to work better @ lower impedence Vs the bjt. With this circuit its a balancing act of current, impedence/speed, and how close it gets to gnd on HIGH.

I slowed down the simulation rate to 1us every second, i’m confident a hex buffer followed by a FET or JFET should work well. I think i went with 220ohm impedence from source & to drain, rise is a bit quicker due to only going through the first 220ohm resistor vs both for fall).
 
Please tell us what instrument this is for.

You've said organ/keyboard, Yamaha, 14 note polyphony, analog with digital control and it's pre-MIDI so old. So curious it's killing me.
 
I wasn't able to make my circuit simulation malfunction using the pulse width values you gave. So, perhaps I'm not simulating it correctly? I wonder what your scope output does look like using this circuit only with your -15V pulse data. Then, if this test looks OK, connect this output to the input of a CD4050 and see what the output does..

sync_data.jpg
 
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