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Thread: F_BUS for Teensy 4.0

  1. #1

    F_BUS for Teensy 4.0

    Hello again.

    I try to compile a Teensy 3.6 application for Teensy 4.0.
    I receive the compilation error "'F_BUS' was not declared in this scope".

    I have searched all the sources of the new Teensyduino installation, and F_BUS does not appear to me, what is most similar is F_BUS_ACTUAL in clockspeed.c, core_pins.h, delay.c, HardwareSerial.h, imxrt.h and pwm.c

    Should I replace F_BUS with F_BUS_ACTUAL in my sources for Teensy 4.0?

    Thanks.

  2. #2
    Senior Member PaulStoffregen's Avatar
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    It depends... on what the code we can't see is actually doing with F_BUS. Usually F_BUS is used with very hardware-specific code that accesses timers or other hardware registers. If it's doing that, resolving F_BUS will be only the beginning of porting...

  3. #3
    Thanks paul
    Yes, it seems that F_BUS is used to calculate the frequency of the timers. I have added a #define F_BUS F_BUS_ACTUAL to my sources and it no longer gives that compilation error, but I still don't know if it is correct.

    This is the rest of the source where the F_BUS is used:
    // hardware-specific definitions
    // prescale of 1 is F_BUS/2
    #define LATCH_TIMER_PRESCALE 0x01
    #define TIMER_FREQUENCY (F_BUS/2)
    #define NS_TO_TICKS(X) (uint32_t)(TIMER_FREQUENCY * ((X) / 1000000000.0))
    #define LATCH_TIMER_PULSE_WIDTH_TICKS NS_TO_TICKS(LATCH_TIMER_PULSE_WIDTH_NS)
    #define TICKS_PER_ROW (TIMER_FREQUENCY/refreshRate/matrixRowsPerFrame)
    #define IDEAL_MSB_BLOCK_TICKS (TICKS_PER_ROW/2)
    #define MIN_BLOCK_PERIOD_NS (LATCH_TO_CLK_DELAY_NS + ((PANEL_32_PIXELDATA_TRANSFER_MAXIMUM_NS*PIXELS_PE R_LATCH)/32))
    #define MIN_BLOCK_PERIOD_TICKS NS_TO_TICKS(MIN_BLOCK_PERIOD_NS)
    #define PIXELS_PER_LATCH ((matrixWidth * matrixHeight) / matrixPanelHeight)


    I also have this error in the compilation, which I think is related to a timer: 'FTM1_SC' was not declared in this scope

    I have not found any source for Teensy 4.0 in Teensyduino, with this definition, I suppose the configuration of the timers with respect to Teensy 3.6 will be completely different.

    Is there any documentation for Teensy 4.0 on how to configure the timers? I am also interested in what is related to DMA and SPI, to know if it is different from the Teensy 3.6 configuration, in order to port the application.

  4. #4
    Senior Member+ KurtE's Avatar
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    As with many of these things the best thing is the T4 data sheets: https://www.pjrc.com/teensy/datasheets.html

    As for SPI, yes it is a lot different than the T3.x. For example the FIFO queues allow you to transmit/receive up to 32 bits of data per item instead of 16, BUT it does not have encoding of data in the 32 bits like the T3.6 which specified which CTAR (does not exist on T4) nor state of CS pins... Registers are very different:
    On T3.x you have PUSHR to put stuff on stack on T4 you have TDR (Transmit data register) and TCR (Transmit Control register)...

    As for the DMA stuff, there is lots of interesting things to learn to use and how to work around...
    You can see examples of using DMA, with the current SPI library as well as a few of the graphic libraries we have played with, including my ILI9341_t3n the SD7735/89_t3 library...

    Some of the interesting things include: if your memory is high space (either DMAMEM or malloc), you can run into issues where the values you get using DMA does not match what other places see as the values.

    That is when you do DMA, it goes directly to the actual memory, where if you do something that simply access a variable it might go through CACHE. So you will see things in SPI library that if you do a write operation with SPI, it will tell the system to flush the cache for that region such that they are the same. Likewise if you do a DMA read operation, it will tell the system to kill the data in the cache such that it will reload with new current data...

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