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Thread: FlexCAN timestamp limitations

  1. #1
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    FlexCAN timestamp limitations

    I'm building a Teensy 3.6 based CAN bus sniffer/splitter/injector and would like a good timestamp solution, but the provided timestamp just doesn't seem up to the task. Could anyone validate my understanding below and comment on possible solutions?

    My understanding is that the timestamp is based on a 16-bit free running timer which runs at the baud rate set for the controller. In my case at 500kbps that would mean the timestamp would roll over every 131ms or so, (65535/500000=0.13107). If the controller is capturing every message on the bus that's probably not an issue but if I filter for specific messages that might only be generated every second or so I have no way to time them using the timestamp. (It's a shame that they don't use the full 32-bit register!)

    What I've implemented at the moment is my own timestamp using millis(). This doesn't have good enough resolution for a fully running bus so I'm going to switch to micros(). However, I wanted to use the FlexCAN timestamp to ensure message order is maintained. I don't know that message order is definitely an issue as I haven't tested under heavy loads yet, but I'd like to protect myself against the possibility and future projects might run under more demanding scenarios.

    Any suggestions as to what else I could do?
    Last edited by DaveAK; 08-29-2019 at 07:50 PM.

  2. #2
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    Have you tried
    Code:
    IntervalTimer
    Trigger the interrupt on the RX buffer once the message passes your filters.

  3. #3
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    if you are looking for ordering good luck. FIFO is your friend with mailboxes set to disabled or TX.
    FIFO will always have them ordered as they are accepted by hardware filters, no timestamp managing needed and only one location to pull sequential frames..

  4. #4
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    Quote Originally Posted by tonton81 View Post
    if you are looking for ordering good luck. FIFO is your friend with mailboxes set to disabled or TX.
    FIFO will always have them ordered as they are accepted by hardware filters, no timestamp managing needed and only one location to pull sequential frames..
    I was hoping for a library solution rather than rolling my own. Right now I'm using CollinK's library, but I know you've written one with FIFO. Last I looked it was only for a single CAN controller, is that still the case? I need both CAN controllers for my application.

    Edit: I should have looked more carefully. Looks like dual can controllers are supported. Off to give it a try!

  5. #5
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    its dual fifo on 3.6, each have fifo. just disable the RX mailboxes and call it a day. The problem with mailboxes are if you dont read then by the time the next frame pops in the timestamps also change, making it harder to sort, especially during rollovers. I could rig up a buffer that does the sorting you want but those timestamps are not reliable for sorting frames from mailboxes. in fifo you read the oldest one. It’s 6 frames deep, so as long as your processing it in the interrupt or polling fast enough, theyll be ordered. I say to disable the mailboxes to prevent frames from going there when fifo is full, so frames only enter fifo

  6. #6
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    Taking a look at this now and it looks pretty straightforward. If I'm wanting strict FIFO read and writes I should just enable FIFO with interrupts/disable mailboxes on the read side and then I can set the msg.seq flag to 1 to ensure ordered transmission, correct? I'm modifying my test code to use this library and then going to try and dump my H-D ECU. Then I can compare my dump with what's captured by Teensy and see if I've got any missing bytes.

    Thanks for your work Antonio! This should get me back on track with my own project.

  7. #7
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    Hey Antonio, I ran in to an issue that I posted to your IFCT thread so that it's available to all who might be following it.
    Last edited by DaveAK; 09-02-2019 at 12:54 AM.

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