Help with plan for force sensitive matrix project.

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marsthrax

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I am trying to make a force sensitive resistor matrix to cover a 7"x16" area. The basic idea came from two videos that show a larger form factor (yoga mat):

Part 1: https://www.youtube.com/watch?v=4JBSHqUcaG4
Part 2: https://www.youtube.com/watch?v=0uPZwMg5B3k

In a nutshell, the columns (in my case, 32 strips of 1/4" copper tape) will be oriented perpendicularly to 14 strips of 1/4" copper tape, separated by a layer of velostat as a force sensitive resistor. Each copper tape strip will be 1/4" apart. I would apply a voltage to one column at a time, then read each of the 14 analog inputs to get the value of that row. Because of the number of wires and components, I'm looking to make a PCB for the first time which will mount a Teensy, multiplexers/diodes/resistors, and connect to the sensor array via FFC. Since this is my first time trying that, I'm hoping to get some thoughts on what I've done so far, and whether there any obvious gotchas I should be aware of. It is worth noting that I would like to get as high of a scan rate as is feasible to drive a real time display.

Here is the schematic I have so far:
Schematic.jpg

Here is how I have it routed:
TeensyTouch-brd.svg.png

Given all of that, I have a few questions:

1) Does it make sense to use a Teensy 4.0 at this point, or is it too early for something like this? I chose it because it is supposed to be much faster, so presumably would give me better refresh rates.
2) I notice Teensy 4.0 doesn't have AGND and AREF. My understanding is that those provided better isolation for analog signals. Is that something I should be wary of, or does it not really apply here?
3) The schematic from the videos that I found shows capacitors, which I assume are creating a low pass filter for the analog inputs. Is that something I should do here as well? I saw a post related to analog read speed on the forums that implied the capacitors may be less useful at higher read rates.
4) Most tutorials show using a 10k pull-down resistor with the FSR. From what I've read, using a smaller resistor (say, 1k) may allow for sensitivity to larger forces. Is there any issue with using 1k in this case?
5) Would multiplexing be a better for the analog inputs than having each connect directly to an analog pin? One complexity I have is that I need to design the PCB to use pogo pins or something to hit the pads on the bottom. I'm also curious if using one external multiplexer for each ADC would have any benefits over using the internal switching.
6) Would a shift register be better for the columns? Only 1 will be active at a time. My current setup also has me activating only one of the multiplexers at once.
7) Are there things I can/should optimize about the component layouts? Could the trace lengths as they are be an issue? If I move/re-orient the diodes/resistors, they can probably be shorter, but the routing became more complex in the variants I tried.
 
I'm not sure how far along you already are, but I'd suggest taking the time to make some smaller scale prototypes. Velostat is actually a packaging material and not subject to the same quality constraints in regards to its electrical properties as say an actual FSR. I found wild variations in conductivity between sheets. Additionally, be aware that FSRs in a voltage divider configuration are very non-linear.
 
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