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Thread: Soft reboot on Teensy4.0

  1. #1

    Soft reboot on Teensy4.0

    Is there a way to trigger a reboot of the teensy 4.0 from the code? E.g. using watchdog? Anyone implemented it already?

  2. #2
    Senior Member+ defragster's Avatar
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    not sure of the net effect - but yesterday a link to tonton81 github IIRC show a T4 watchdog sketch ….

  3. #3
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    Not sure if this will work on a t4, but works on a teensy 3.2
    // in globals declaration section
    #define CPU_RESTART_ADDR (uint32_t *)0xE000ED0C
    #define CPU_RESTART_VAL 0x5FA0004
    #define CPU_RESTART (*CPU_RESTART_ADDR = CPU_RESTART_VAL);


    // Then in loop do something like

    if (digitalRead(2) == HIGH){
    CPU_RESTART;
    }

  4. #4
    Quote Originally Posted by defragster View Post
    not sure of the net effect - but yesterday a link to tonton81 github IIRC show a T4 watchdog sketch .
    I saw it also yesterday by accident.
    That does not work for me. The project is blocking the T4.
    I think it was developed for the T4beta1 using the 1052

  5. #5
    Quote Originally Posted by Jean-Marc View Post
    I saw it also yesterday by accident.
    That does not work for me. The project is blocking the T4.
    I think it was developed for the T4beta1 using the 1052
    Also tried below procedure but no luck (see 1060 manual)

    *(volatile uint32_t *)0x400BC004 = 0xD928C520;
    while((*(volatile uint32_t *)0x400BC000 & (1UL<<11) )==0);
    *(volatile uint32_t *)0x400BC008 = 256;
    *(volatile uint32_t *)0x400BC000 |= (1UL<<7) + (1UL<<8) + (1UL<<6) + (1UL<<15)+ (1UL<<5);
    while((*(volatile uint32_t *)0x400BC000 & (1UL<<10) )==0);


    *(volatile uint32_t *)0x400BC004 = 0xB480A602;

  6. #6
    Quote Originally Posted by Jean-Marc View Post
    Also tried below procedure but no luck (see 1060 manual)

    *(volatile uint32_t *)0x400BC004 = 0xD928C520;
    while((*(volatile uint32_t *)0x400BC000 & (1UL<<11) )==0);
    *(volatile uint32_t *)0x400BC008 = 256;
    *(volatile uint32_t *)0x400BC000 |= (1UL<<7) + (1UL<<8) + (1UL<<6) + (1UL<<15)+ (1UL<<5);
    while((*(volatile uint32_t *)0x400BC000 & (1UL<<10) )==0);


    *(volatile uint32_t *)0x400BC004 = 0xB480A602;
    I asso don't see why I would unlock the WDOG.
    I don't see it locked in startup code?

  7. #7
    SCB_AIRCR = 0x5FA0004;
    while (true) {
    ;
    }
    Also not working on the T4

  8. #8
    Senior Member+ manitou's Avatar
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    Quote Originally Posted by Jean-Marc View Post
    I saw it also yesterday by accident.
    That does not work for me. The project is blocking the T4.
    I think it was developed for the T4beta1 using the 1052
    The NXP 1060 SDK has a WDOG example, and I believe the program (wdog.c) is identical to the 1050 SDK version. The example works on the NXP 1050 eval board and workson 1060 eval board.
    Code:
    /*
     * Copyright (c) 2016, Freescale Semiconductor, Inc.
     * Copyright 2016-2018 NXP
     * All rights reserved.
     *
     * SPDX-License-Identifier: BSD-3-Clause
     */
    
    #include "fsl_debug_console.h"
    #include "board.h"
    
    #include "fsl_wdog.h"
    
    #include "pin_mux.h"
    #include "clock_config.h"
    /*******************************************************************************
     * Definitions
     ******************************************************************************/
    #define DEMO_WDOG_BASE WDOG1
    #define DEMO_WDOG_IRQHandler WDOG1_IRQHandler
    
    /*******************************************************************************
     * Prototypes
     ******************************************************************************/
    
    /*******************************************************************************
    * Variables
    ******************************************************************************/
    
    /*******************************************************************************
     * Code
     ******************************************************************************/
    void DEMO_WDOG_IRQHandler(void)
    {
        WDOG_Refresh(DEMO_WDOG_BASE);
        WDOG_ClearInterruptStatus(DEMO_WDOG_BASE, kWDOG_InterruptFlag);
        /*User code. */
        PRINTF(" \r\nWDOG has be refreshed!");
    }
    
    /*!
     * @brief Main function
     */
    int main(void)
    {
        uint16_t resetFlag = 0U;
        wdog_config_t config;
        BOARD_ConfigMPU();
        BOARD_InitPins();
        BOARD_BootClockRUN();
        BOARD_InitDebugConsole();
    
        PRINTF("\r\n******** System Start ********\r\n");
        PRINTF("System reset by:");
    
        resetFlag = WDOG_GetStatusFlags(DEMO_WDOG_BASE);
    
        switch (resetFlag & (kWDOG_PowerOnResetFlag | kWDOG_TimeoutResetFlag | kWDOG_SoftwareResetFlag))
        {
            case kWDOG_PowerOnResetFlag:
                PRINTF(" Power On Reset!\r\n");
                break;
            case kWDOG_TimeoutResetFlag:
                PRINTF(" Time Out Reset!\r\n");
                break;
            case kWDOG_SoftwareResetFlag:
                PRINTF(" Software Reset!\r\n");
                break;
            default:
                PRINTF(" Error status!\r\n");
                break;
        }
    /* Disable wdog reset function test for some devices can't using this feature. */
    #if (!(defined(EXAMPLE_DISABLE_WDOG_RESET_FUNCTION) && EXAMPLE_DISABLE_WDOG_RESET_FUNCTION))
        /* If system reset from power on, trigger a software reset. */
        if (resetFlag & kWDOG_PowerOnResetFlag)
        {
            PRINTF("\r\n- 1.Testing System reset by software trigger...   ");
            WDOG_TriggerSystemSoftwareReset(DEMO_WDOG_BASE);
        }
    
        /* If system reset from software trigger, testing the timeout reset. */
        if (resetFlag & kWDOG_SoftwareResetFlag)
        {
            PRINTF("\r\n- 2.Testing system reset by WDOG timeout.\r\n");
            /*
             * wdogConfig->enableWdog = true;
             * wdogConfig->workMode.enableWait = true;
             * wdogConfig->workMode.enableStop = false;
             * wdogConfig->workMode.enableDebug = false;
             * wdogConfig->enableInterrupt = false;
             * wdogConfig->enablePowerdown = false;
             * wdogConfig->resetExtension = flase;
             * wdogConfig->timeoutValue = 0xFFU;
             * wdogConfig->interruptTimeValue = 0x04u;
             */
            WDOG_GetDefaultConfig(&config);
            config.timeoutValue = 0xFU; /* Timeout value is 2.5 sec. */
            WDOG_Init(DEMO_WDOG_BASE, &config);
            PRINTF("--- wdog Init done---\r\n");
        }
    
        /* If system reset from WDOG timeout, testing the refresh function using interrupt. */
        if (resetFlag & kWDOG_TimeoutResetFlag)
        {
    #endif
            PRINTF("\r\n- 3.Test the WDOG refresh function by using interrupt.\r\n");
            /*
             * wdogConfig->enableWdog = true;
             * wdogConfig->workMode.enableWait = true;
             * wdogConfig->workMode.enableStop = false;
             * wdogConfig->workMode.enableDebug = false;
             * wdogConfig->enableInterrupt = false;
             * wdogConfig->enablePowerdown = false;
             * wdogConfig->resetExtension = flase;
             * wdogConfig->timeoutValue = 0xFFU;
             * wdogConfig->interruptTimeValue = 0x04u;
             */
            WDOG_GetDefaultConfig(&config);
            config.timeoutValue = 0xFU; /* Timeout value is 8 sec. */
            config.enableInterrupt = true;
            config.interruptTimeValue = 0x4U; /* Interrupt occurred 2 sec before WDOG timeout. */
            WDOG_Init(DEMO_WDOG_BASE, &config);
    
            PRINTF("--- wdog Init done---\r\n");
    
    #if (!(defined(EXAMPLE_DISABLE_WDOG_RESET_FUNCTION) && EXAMPLE_DISABLE_WDOG_RESET_FUNCTION))
        }
    #endif
    
        while (1)
        {
        }
    }
    output from 1060 eval board test
    Code:
            System reset by: Power On Reset!
    
            - 1.Testing System reset by software trigger... �
            ******** System Start ********
            System reset by: Software Reset!
    
            - 2.Testing system reset by WDOG timeout.
            --- wdog Init done---
    
            ******** System Start ********
            System reset by: Time Out Reset!
    
            - 3.Test the WDOG refresh function by using interrupt.
            --- wdog Init done---
    
             WDOG has be refreshed!
             WDOG has be refreshed!
             WDOG has be refreshed!
             WDOG has be refreshed!
         ...
    FWIW, i made a wdog1.ino that does the same WDOG1 tests as the SDK example. The sketch works on T4B1 (1050), but on the production T4 (1060) it fails to restart after a watchdog timeout or a software reset.
    Last edited by manitou; 10-05-2019 at 12:06 PM. Reason: works on 1060 eval board

  9. #9
    Senior Member+ manitou's Avatar
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    the NXP 1060 SDK example does a software reset with base->WCR &= ~WDOG_WCR_SRS_MASK;

    on T4 (1060), WDOG1_WCR &= ~WDOG_WCR_SRS will cause a reset (sermon gray) but T4 doesn't restart. The T4B1 (1050) does restart on software reset.

    Same behavior for SCB_AIRCR = 0x05FA0004;, resets and restarts on T4B1, but doesn't restart on T4 (1060).
    Last edited by manitou; 10-05-2019 at 10:04 PM.

  10. #10
    Same behaviour as with wdog sample of tonton81 I had posted the question yesterday in the teensy beta thread, Tonton81 did react and will have a look later. Thanks to all.

  11. #11
    Senior Member+ defragster's Avatar
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    Quote Originally Posted by Jean-Marc View Post
    Same behaviour as with wdog sample of tonton81 I had posted the question yesterday in the teensy beta thread, Tonton81 did react and will have a look later. Thanks to all.
    For ref here what was the observed behavior?

    IIRC - first person trying this from other links - it lead to T4 sitting in bootloader?

  12. #12
    Senior Member+ mjs513's Avatar
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    Seems both WDOG and SCB_AIRCR suffer from the same system. When executed it shuts down the T4 as opposed to restarting - this was discussed in a couple of other threads as well:

    https://forum.pjrc.com/threads/57553...ight=SCB_AIRCR

  13. #13
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    #define CPU_RESTART_ADDR (uint32_t *)0xE000ED0C
    #define CPU_RESTART_VAL 0x5FA0004
    #define CPU_RESTART (*CPU_RESTART_ADDR = CPU_RESTART_VAL);
    Generic M7 manual indicates that this should work (same as T3.x), but I guess it doesn't.

    So has nobody figured out how to do a soft-reset on T4?

  14. #14
    Quote Originally Posted by roach374 View Post
    Generic M7 manual indicates that this should work (same as T3.x), but I guess it doesn't.

    So has nobody figured out how to do a soft-reset on T4?
    This is indeed the Arm7 procedure working on the T3.6 but not working on the T4.
    No progress so far.

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